Mentions légales du service

Skip to content
Snippets Groups Projects
Commit a6b47a16 authored by REGAL-MEZIN Colin's avatar REGAL-MEZIN Colin
Browse files

WIP - Update of engelbourg cluster description

parent e1afad64
No related branches found
No related tags found
1 merge request!1112Testing engelbourg
Pipeline #1137715 passed
Stage: .pre
Stage: validate
Stage: generate
Stage: deploy
Stage: checks
Hide whitespace changes
Inline Side-by-side
Showing
with 66 additions and 66 deletions
data/grid5000/accesses/refrepo.json
+ 32
− 32
View file @ a6b47a16
......@@ -126970,8 +126970,8 @@
],
"nodeset": "engelbourg",
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -126979,10 +126979,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......@@ -127052,8 +127052,8 @@
],
"nodeset": "engelbourg",
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -127061,10 +127061,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......@@ -127134,8 +127134,8 @@
],
"nodeset": "engelbourg",
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -127143,10 +127143,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......@@ -127216,8 +127216,8 @@
],
"nodeset": "engelbourg",
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -127225,10 +127225,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......@@ -127298,8 +127298,8 @@
],
"nodeset": "engelbourg",
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -127307,10 +127307,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......@@ -127380,8 +127380,8 @@
],
"nodeset": "engelbourg",
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -127389,10 +127389,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......@@ -127462,8 +127462,8 @@
],
"nodeset": "engelbourg",
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -127471,10 +127471,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......@@ -127544,8 +127544,8 @@
],
"nodeset": "engelbourg",
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -127553,10 +127553,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
data/grid5000/sites/strasbourg/clusters/engelbourg/nodes/engelbourg-1.json
+ 4
− 4
View file @ a6b47a16
......@@ -77,8 +77,8 @@
"turboboost_enabled": true
},
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -86,10 +86,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......
data/grid5000/sites/strasbourg/clusters/engelbourg/nodes/engelbourg-2.json
+ 4
− 4
View file @ a6b47a16
......@@ -77,8 +77,8 @@
"turboboost_enabled": true
},
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -86,10 +86,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......
data/grid5000/sites/strasbourg/clusters/engelbourg/nodes/engelbourg-3.json
+ 4
− 4
View file @ a6b47a16
......@@ -77,8 +77,8 @@
"turboboost_enabled": true
},
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -86,10 +86,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......
data/grid5000/sites/strasbourg/clusters/engelbourg/nodes/engelbourg-4.json
+ 4
− 4
View file @ a6b47a16
......@@ -77,8 +77,8 @@
"turboboost_enabled": true
},
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -86,10 +86,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......
data/grid5000/sites/strasbourg/clusters/engelbourg/nodes/engelbourg-5.json
+ 4
− 4
View file @ a6b47a16
......@@ -77,8 +77,8 @@
"turboboost_enabled": true
},
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -86,10 +86,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......
data/grid5000/sites/strasbourg/clusters/engelbourg/nodes/engelbourg-6.json
+ 4
− 4
View file @ a6b47a16
......@@ -77,8 +77,8 @@
"turboboost_enabled": true
},
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -86,10 +86,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......
data/grid5000/sites/strasbourg/clusters/engelbourg/nodes/engelbourg-7.json
+ 4
− 4
View file @ a6b47a16
......@@ -77,8 +77,8 @@
"turboboost_enabled": true
},
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -86,10 +86,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......
data/grid5000/sites/strasbourg/clusters/engelbourg/nodes/engelbourg-8.json
+ 4
− 4
View file @ a6b47a16
......@@ -77,8 +77,8 @@
"turboboost_enabled": true
},
"performance": {
"core_flops": 128,
"node_flops": 9216
"core_flops": 25600000000,
"node_flops": 1843200000000
},
"processor": {
"cache_l1": null,
......@@ -86,10 +86,10 @@
"cache_l1i": 8,
"cache_l2": 8,
"cache_l3": 8,
"clock_speed": 8,
"clock_speed": 1600000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Haswell",
"microarchitecture": "Broadwell",
"microcode": "0xd000001",
"model": "Unknown",
"other_description": "description",
......
input/grid5000/sites/strasbourg/clusters/engelbourg/engelbourg.yaml
+ 2
− 2
View file @ a6b47a16
......@@ -17,8 +17,8 @@ nodes:
besteffort: true
max_walltime: 0
processor:
microarchitecture: Haswell # TODO: replace with microarch name.
clock_speed: 8 # TODO: Replace with clock speed.
microarchitecture: Broadwell # TODO: replace with microarch name.
clock_speed: 1600000000 # TODO: Replace with clock speed.
network_adapters:
bmc:
enabled: true
......
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment