Commit 01862304 authored by MICHON Nicolas's avatar MICHON Nicolas
Browse files

[grenoble] Ignore ib1 properties for homogeneity of all edel nodes

parent a6163e0d
......@@ -152,7 +152,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -155,7 +155,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -155,7 +155,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -155,7 +155,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -152,7 +152,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -155,7 +155,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -155,7 +155,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -155,7 +155,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -155,7 +155,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -152,7 +152,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -155,7 +155,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -155,7 +155,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -155,7 +155,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -152,7 +152,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -155,7 +155,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......
......@@ -97,21 +97,10 @@ sophia:
- +chassis.serial
- ~chassis.manufacturer
grenoble:
edel-3:
edel-[1-72]:
- +network_adapters.ib1.guid
edel-5:
- -network_adapters.ib1.guid
edel-7:
- +network_adapters.ib1.guid
edel-16:
- -network_adapters.ib1.guid
edel-17:
- +network_adapters.ib1.guid
edel-37:
- -network_adapters.ib1.guid
edel-38:
- +network_adapters.ib1.guid
edel-41:
- -network_adapters.ib1.guid
edel-43:
- +network_adapters.ib1.guid
- +network_adapters.ib1.model
- -network_adapters.ib1.model
- +network_adapters.ib1.vendor
- -network_adapters.ib1.vendor
......@@ -377,7 +377,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -989,7 +989,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -1193,7 +1193,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -1601,7 +1601,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -1802,7 +1802,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -2404,7 +2404,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -2809,7 +2809,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -5801,7 +5801,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -6808,7 +6808,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -7599,7 +7599,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -7803,7 +7803,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -8786,7 +8786,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -9793,7 +9793,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -11395,7 +11395,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -11599,7 +11599,7 @@
"cache_l1i": 32768,
"cache_l2": 262144,
"cache_l3": 8388608,
"clock_speed": 2250000000,
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Nehalem",
......@@ -67,7 +67,7 @@ edel-1:
cache_l1i: 32768
cache_l2: 262144
cache_l3: 8388608
clock_speed: 2250000000
clock_speed: 2300000000
ht_capable: true
instruction_set: x86-64
model: Intel Xeon
......
......@@ -75,7 +75,7 @@ edel-12:
cache_l1i: 32768
cache_l2: 262144
cache_l3: 8388608
clock_speed: 2250000000
clock_speed: 2300000000
ht_capable: true
instruction_set: x86-64
model: Intel Xeon
......
......@@ -75,7 +75,7 @@ edel-13:
cache_l1i: 32768
cache_l2: 262144
cache_l3: 8388608
clock_speed: 2250000000
clock_speed: 2300000000
ht_capable: true
instruction_set: x86-64
model: Intel Xeon
......
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