Commit da8262dc authored by Jean-Christophe Filliâtre's avatar Jean-Christophe Filliâtre
Browse files

new implementation of the pairing algorithm, updated proof sessions

parent ac544eac
......@@ -35,7 +35,7 @@
locfile="../add_list.mlw"
loclnum="32" loccnumb="8" loccnume="11"
expl="VC for sum"
sum="3a88e37519a95048cc50ef9138956651"
sum="b655fa25e271e649aca23e9cc43dddcd"
proved="true"
expanded="true"
shape="CV0aNilainfix =c0.0aadd_realV0Aainfix =c0aadd_intV0aConsVVCV1aIntegerVainfix =V4aadd_realV0Aainfix =ainfix +V5V3aadd_intV0aRealVainfix =ainfix +.V6V4aadd_realV0Aainfix =V3aadd_intV0Iainfix =V4aadd_realV2Aainfix =V3aadd_intV2FF">
......@@ -71,7 +71,7 @@
locfile="../add_list.mlw"
loclnum="44" loccnumb="4" loccnume="8"
expl="VC for main"
sum="df005abc0acb54725806339e698597f8"
sum="47f3e40b493f519ebf1c4be2f438d08a"
proved="true"
expanded="true"
shape="ainfix =V1c4.7Aainfix =V0c22Iainfix =V1aadd_realaConsaIntegerc5aConsaRealc3.3aConsaIntegerc8aConsaRealc1.4aConsaIntegerc9aNilAainfix =V0aadd_intaConsaIntegerc5aConsaRealc3.3aConsaIntegerc8aConsaRealc1.4aConsaIntegerc9aNilF">
......@@ -106,7 +106,7 @@
locfile="../add_list.mlw"
loclnum="63" loccnumb="4" loccnume="7"
expl="VC for sum"
sum="ba225088321d5a1a8cae0184cb19113d"
sum="c41dd4b709a78980ecafa56e520f250b"
proved="true"
expanded="true"
shape="itCV1aNilainfix =V2aadd_realV0Aainfix =V3aadd_intV0aConsaIntegerVVainfix =ainfix +.V2aadd_realV7aadd_realV0Aainfix =ainfix +V6aadd_intV7aadd_intV0Iainfix =V7V5FIainfix =V6ainfix +V3V4FaConsaRealVVainfix =ainfix +.V10aadd_realV11aadd_realV0Aainfix =ainfix +V3aadd_intV11aadd_intV0Iainfix =V11V9FIainfix =V10ainfix +.V2V8FfIainfix =ainfix +.V2aadd_realV1aadd_realV0Aainfix =ainfix +V3aadd_intV1aadd_intV0FAainfix =ainfix +.c0.0aadd_realV0aadd_realV0Aainfix =ainfix +c0aadd_intV0aadd_intV0F">
......@@ -134,7 +134,7 @@
locfile="../add_list.mlw"
loclnum="86" loccnumb="4" loccnume="8"
expl="VC for main"
sum="1cf88d24902cc9a993f7d1ddf27c27bf"
sum="d6d5b03ee7f7b7855cd1135a9c87ab0e"
proved="true"
expanded="true"
shape="ainfix =V1c4.7Aainfix =V0c22Iainfix =V1aadd_realaConsaIntegerc5aConsaRealc3.3aConsaIntegerc8aConsaRealc1.4aConsaIntegerc9aNilAainfix =V0aadd_intaConsaIntegerc5aConsaRealc3.3aConsaIntegerc8aConsaRealc1.4aConsaIntegerc9aNilF">
......
This diff is collapsed.
......@@ -28,7 +28,7 @@
locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19"
expl="VC for quicksort"
sum="b40455eea6fa8f5f8be3ae873ef4b885"
sum="5bad16d0f07bc4f66c98b988f2fd73a7"
proved="true"
expanded="true"
shape="iainfix <V1V2asorted_subV8V1ainfix +V2c1Aapermut_subV3V8V1ainfix +V2c1Aapermut_subV7V8V1ainfix +V2c1Iasorted_subV8V5ainfix +V2c1Aapermut_subV7V8V5ainfix +V2c1Aainfix <=c0V0FAainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Aainfix <ainfix -V2V5ainfix -V2V1Aainfix <=c0ainfix -V2V1Aapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FAainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Aainfix <ainfix -V4V1ainfix -V2V1Aainfix <=c0ainfix -V2V1Iainfix >=agetV6V10V9Iainfix <=V10V2Aainfix <=V5V10FAainfix =agetV6V11V9Iainfix <V11V5Aainfix <V4V11FAainfix <=agetV6V12V9Iainfix <=V12V4Aainfix <=V1V12FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FAainfix <V2V0Aainfix <V1V2Aainfix <=c0V1asorted_subV3V1ainfix +V2c1Aapermut_subV3V3V1ainfix +V2c1Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
......@@ -43,7 +43,7 @@
locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19"
expl="1. precondition"
sum="a45b02e8c4d56b83dd0ba0d355ebd5d3"
sum="78ff0ba8a03ecb4552b6894224928cf3"
proved="true"
expanded="true"
shape="ainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
......@@ -63,7 +63,7 @@
locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19"
expl="2. variant decrease"
sum="0bf365deaa3a34ff3134bfbd740b2574"
sum="1a2d41703fab4faaeb527dbf69806fdc"
proved="true"
expanded="true"
shape="ainfix <ainfix -V4V1ainfix -V2V1Aainfix <=c0ainfix -V2V1Iainfix >=agetV6V8V7Iainfix <=V8V2Aainfix <=V5V8FAainfix =agetV6V9V7Iainfix <V9V5Aainfix <V4V9FAainfix <=agetV6V10V7Iainfix <=V10V4Aainfix <=V1V10FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
......@@ -83,7 +83,7 @@
locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19"
expl="3. precondition"
sum="185085aaf34ff7553db76e027b7b6ba4"
sum="5c4469adf46d4939a3813d207849f75d"
proved="true"
expanded="true"
shape="ainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V8V7Iainfix <=V8V2Aainfix <=V5V8FAainfix =agetV6V9V7Iainfix <V9V5Aainfix <V4V9FAainfix <=agetV6V10V7Iainfix <=V10V4Aainfix <=V1V10FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
......@@ -103,7 +103,7 @@
locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19"
expl="4. assertion"
sum="b21840d6e68ef9ac3f747096b12f348d"
sum="235590bf66c96bcffc40647251ca8e7a"
proved="true"
expanded="true"
shape="apermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V9V8Iainfix <=V9V2Aainfix <=V5V9FAainfix =agetV6V10V8Iainfix <V10V5Aainfix <V4V10FAainfix <=agetV6V11V8Iainfix <=V11V4Aainfix <=V1V11FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
......@@ -123,7 +123,7 @@
locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19"
expl="5. variant decrease"
sum="810c5db5caf74579f3183df10554cfb4"
sum="ac836f8d3f086054674e4c60090520a9"
proved="true"
expanded="true"
shape="ainfix <ainfix -V2V5ainfix -V2V1Aainfix <=c0ainfix -V2V1Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V9V8Iainfix <=V9V2Aainfix <=V5V9FAainfix =agetV6V10V8Iainfix <V10V5Aainfix <V4V10FAainfix <=agetV6V11V8Iainfix <=V11V4Aainfix <=V1V11FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
......@@ -143,7 +143,7 @@
locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19"
expl="6. precondition"
sum="97247797257b81988b838ad9002f4cf7"
sum="6546b46be7267386af528de814800fc2"
proved="true"
expanded="true"
shape="ainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V9V8Iainfix <=V9V2Aainfix <=V5V9FAainfix =agetV6V10V8Iainfix <V10V5Aainfix <V4V10FAainfix <=agetV6V11V8Iainfix <=V11V4Aainfix <=V1V11FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
......@@ -163,7 +163,7 @@
locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19"
expl="7. assertion"
sum="d410783d8fe90fe9ec9bae2f09528720"
sum="75c69e76e7f0c4a831886e9b503d9edd"
proved="true"
expanded="true"
shape="apermut_subV7V8V1ainfix +V2c1Iasorted_subV8V5ainfix +V2c1Aapermut_subV7V8V5ainfix +V2c1Aainfix <=c0V0FIainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V10V9Iainfix <=V10V2Aainfix <=V5V10FAainfix =agetV6V11V9Iainfix <V11V5Aainfix <V4V11FAainfix <=agetV6V12V9Iainfix <=V12V4Aainfix <=V1V12FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
......@@ -183,7 +183,7 @@
locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19"
expl="8. postcondition"
sum="d7b340f2383cfa547f1ddddda332d682"
sum="be21a4eeb36482399f92dac7cbe0c767"
proved="true"
expanded="true"
shape="apermut_subV3V8V1ainfix +V2c1Iapermut_subV7V8V1ainfix +V2c1Iasorted_subV8V5ainfix +V2c1Aapermut_subV7V8V5ainfix +V2c1Aainfix <=c0V0FIainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V10V9Iainfix <=V10V2Aainfix <=V5V10FAainfix =agetV6V11V9Iainfix <V11V5Aainfix <V4V11FAainfix <=agetV6V12V9Iainfix <=V12V4Aainfix <=V1V12FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
......@@ -203,7 +203,7 @@
locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19"
expl="9. postcondition"
sum="cc4da29a7cb4a6c9c850b3d63fa33ee2"
sum="706b3fda811fd7a432ec6d58ceb01363"
proved="true"
expanded="true"
shape="asorted_subV8V1ainfix +V2c1Iapermut_subV7V8V1ainfix +V2c1Iasorted_subV8V5ainfix +V2c1Aapermut_subV7V8V5ainfix +V2c1Aainfix <=c0V0FIainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V10V9Iainfix <=V10V2Aainfix <=V5V10FAainfix =agetV6V11V9Iainfix <V11V5Aainfix <V4V11FAainfix <=agetV6V12V9Iainfix <=V12V4Aainfix <=V1V12FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
......@@ -231,7 +231,7 @@
locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19"
expl="10. postcondition"
sum="6c0018c482239ff70d1707887727abac"
sum="3b9cbe2d79bcac592f3dffca66734852"
proved="true"
expanded="true"
shape="apermut_subV3V3V1ainfix +V2c1Iainfix <V1V2NIainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
......@@ -251,7 +251,7 @@
locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19"
expl="11. postcondition"
sum="2b9e560b9c4d73531e3e483336932d92"
sum="3b968c1dc9bf57ac80fd52b1a6edcfd7"
proved="true"
expanded="true"
shape="asorted_subV3V1ainfix +V2c1Iainfix <V1V2NIainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
......
This diff is collapsed.
......@@ -51,7 +51,7 @@
name="Test"
locfile="../alphaBeta.mlw"
loclnum="76" loccnumb="7" loccnume="11"
sum="af3ffdef718c759d4773bd79f43e7e30"
sum="1aa960b887d5af278444d89cef166c30"
proved="true"
expanded="false"
shape="ainfix <=aprefix -aposition_valueado_moveV0V1aminmaxV0c1IamemV1V2Lalegal_movesV0F">
......@@ -85,7 +85,7 @@
name="minmax_bound"
locfile="../alphaBeta.mlw"
loclnum="82" loccnumb="8" loccnume="20"
sum="1bcd8a36394df0992b33bb260e348c88"
sum="a3fe8ad5d354c07f77310e49bed57baa"
proved="true"
expanded="false"
shape="ainfix <aminmaxV0V1ainfinityAainfix <aprefix -ainfinityaminmaxV0V1Iainfix >=V1c0F">
......@@ -103,7 +103,7 @@
name="minmax_nomove"
locfile="../alphaBeta.mlw"
loclnum="86" loccnumb="8" loccnume="21"
sum="0b0addfda9118de4bafbe1a65e672cf1"
sum="37f686764a137ef6323e22e3c1c89384"
proved="true"
expanded="false"
shape="ainfix =aminmaxV0V1aposition_valueV0Iainfix =alegal_movesV0aNilAainfix >=V1c0F">
......@@ -184,7 +184,7 @@
locfile="../alphaBeta.mlw"
loclnum="109" loccnumb="10" loccnume="31"
expl="VC for move_value_alpha_beta"
sum="5eeda3672d8d2f2cd58191ef8c15dc40"
sum="e4c492a0ec689b1462b839b1b894fc8c"
proved="true"
expanded="false"
shape="iainfix <V6aprefix -V0Aainfix <aprefix -V1V6ainfix =aprefix -V5aprefix -V6iainfix <=V6aprefix -V1ainfix >=aprefix -V5V1ainfix <=aprefix -V5V0Laminmaxado_moveV2V4ainfix -V3c1Iiainfix <aminmaxado_moveV2V4ainfix -V3c1aprefix -V0Aainfix <aprefix -V1aminmaxado_moveV2V4ainfix -V3c1ainfix =V5aminmaxado_moveV2V4ainfix -V3c1iainfix <=aminmaxado_moveV2V4ainfix -V3c1aprefix -V1ainfix <=V5aprefix -V1ainfix >=V5aprefix -V0FAainfix >=ainfix -V3c1c0Iainfix >=V3c1F">
......@@ -199,7 +199,7 @@
locfile="../alphaBeta.mlw"
loclnum="109" loccnumb="10" loccnume="31"
expl="1. precondition"
sum="a1808fdc345936478c7d217e8986f457"
sum="53a92003b802c519c4f3df9e61415222"
proved="true"
expanded="false"
shape="ainfix >=ainfix -V3c1c0Iainfix >=V3c1F">
......@@ -275,7 +275,7 @@
locfile="../alphaBeta.mlw"
loclnum="109" loccnumb="10" loccnume="31"
expl="2. postcondition"
sum="8140eb9ce7909fb01a2e15bf334a8873"
sum="1b451dfd562ff0261baabe943dd22f7c"
proved="true"
expanded="false"
shape="iainfix <V6aprefix -V0Aainfix <aprefix -V1V6ainfix =aprefix -V5aprefix -V6iainfix <=V6aprefix -V1ainfix >=aprefix -V5V1ainfix <=aprefix -V5V0Laminmaxado_moveV2V4ainfix -V3c1Iiainfix <aminmaxado_moveV2V4ainfix -V3c1aprefix -V0Aainfix <aprefix -V1aminmaxado_moveV2V4ainfix -V3c1ainfix =V5aminmaxado_moveV2V4ainfix -V3c1iainfix <=aminmaxado_moveV2V4ainfix -V3c1aprefix -V1ainfix <=V5aprefix -V1ainfix >=V5aprefix -V0FIainfix >=ainfix -V3c1c0Iainfix >=V3c1F">
......@@ -290,7 +290,7 @@
locfile="../alphaBeta.mlw"
loclnum="109" loccnumb="10" loccnume="31"
expl="1. postcondition"
sum="4991642b458035aa4a6c7ff40583df8f"
sum="c652eed1e2f439d45f47ef23627c75ae"
proved="true"
expanded="false"
shape="ainfix =aprefix -V5aprefix -V6Iainfix <V6aprefix -V0Aainfix <aprefix -V1V6Laminmaxado_moveV2V4ainfix -V3c1Iiainfix <aminmaxado_moveV2V4ainfix -V3c1aprefix -V0Aainfix <aprefix -V1aminmaxado_moveV2V4ainfix -V3c1ainfix =V5aminmaxado_moveV2V4ainfix -V3c1iainfix <=aminmaxado_moveV2V4ainfix -V3c1aprefix -V1ainfix <=V5aprefix -V1ainfix >=V5aprefix -V0FIainfix >=ainfix -V3c1c0Iainfix >=V3c1F">
......@@ -310,7 +310,7 @@
locfile="../alphaBeta.mlw"
loclnum="109" loccnumb="10" loccnume="31"
expl="2. postcondition"
sum="2b8b8d3be5e8e6d388c3cbecd15a9cf9"
sum="84638a48ccdaf2d8b6340da57fb5434c"
proved="true"
expanded="false"
shape="ainfix >=aprefix -V5V1Iainfix <=V6aprefix -V1Iainfix <V6aprefix -V0Aainfix <aprefix -V1V6NLaminmaxado_moveV2V4ainfix -V3c1Iiainfix <aminmaxado_moveV2V4ainfix -V3c1aprefix -V0Aainfix <aprefix -V1aminmaxado_moveV2V4ainfix -V3c1ainfix =V5aminmaxado_moveV2V4ainfix -V3c1iainfix <=aminmaxado_moveV2V4ainfix -V3c1aprefix -V1ainfix <=V5aprefix -V1ainfix >=V5aprefix -V0FIainfix >=ainfix -V3c1c0Iainfix >=V3c1F">
......@@ -330,7 +330,7 @@
locfile="../alphaBeta.mlw"
loclnum="109" loccnumb="10" loccnume="31"
expl="3. postcondition"
sum="d98fbd0104c113af965c1a0969f25348"
sum="83052a9bb2fb4c57bd268f4c476f41d2"
proved="true"
expanded="false"
shape="ainfix <=aprefix -V5V0Iainfix <=V6aprefix -V1NIainfix <V6aprefix -V0Aainfix <aprefix -V1V6NLaminmaxado_moveV2V4ainfix -V3c1Iiainfix <aminmaxado_moveV2V4ainfix -V3c1aprefix -V0Aainfix <aprefix -V1aminmaxado_moveV2V4ainfix -V3c1ainfix =V5aminmaxado_moveV2V4ainfix -V3c1iainfix <=aminmaxado_moveV2V4ainfix -V3c1aprefix -V1ainfix <=V5aprefix -V1ainfix >=V5aprefix -V0FIainfix >=ainfix -V3c1c0Iainfix >=V3c1F">
......@@ -354,7 +354,7 @@
locfile="../alphaBeta.mlw"
loclnum="121" loccnumb="7" loccnume="15"
expl="VC for negabeta"
sum="e275db87e7bafa137960c3e485470254"
sum="9d7bfdbcc42fc5c7cec3abfcab211367"
proved="false"
expanded="true"
shape="iainfix =V3c0iainfix <aminmaxV2V3V1Aainfix <V0aminmaxV2V3ainfix =aposition_valueV2aminmaxV2V3iainfix <=aminmaxV2V3V0ainfix <=aposition_valueV2V0ainfix >=aposition_valueV2V1Calegal_movesV2aNiliainfix <aminmaxV2V3V1Aainfix <V0aminmaxV2V3ainfix =aposition_valueV2aminmaxV2V3iainfix <=aminmaxV2V3V0ainfix <=aposition_valueV2V0ainfix >=aposition_valueV2V1aConsVViainfix >=V6V1iainfix <aminmaxV2V3V1Aainfix <V0aminmaxV2V3ainfix =V6aminmaxV2V3iainfix <=aminmaxV2V3V0ainfix <=V6V0ainfix >=V6V1iainfix <aminmaxV2V3V1Aainfix <V0aminmaxV2V3ainfix =V7aminmaxV2V3iainfix <=aminmaxV2V3V0ainfix <=V7V0ainfix >=V7V1Iiais_emptyV8ainfix =V7V6iainfix <V9V1Aainfix <amaxV6V0V9ainfix =V7V9iainfix <=V9amaxV6V0ainfix <=V7amaxV6V0ainfix >=V7V1LaminaTuple2V2V3V8LaelementsV5FAainfix >=V3c1Iiainfix <V10aprefix -V0Aainfix <aprefix -V1V10ainfix =V6aprefix -V10iainfix <=V10aprefix -V1ainfix >=V6V1ainfix <=V6V0Laminmaxado_moveV2V4ainfix -V3c1FAainfix >=V3c1Iainfix >=V3c0F">
......@@ -369,7 +369,7 @@
locfile="../alphaBeta.mlw"
loclnum="121" loccnumb="7" loccnume="15"
expl="1. postcondition"
sum="7cea8c16f45481393c7ed19323c9cf00"
sum="ab8681aaf4912bba2f99a0ed984911d9"
proved="true"
expanded="false"
shape="iainfix <aminmaxV2V3V1Aainfix <V0aminmaxV2V3ainfix =aposition_valueV2aminmaxV2V3iainfix <=aminmaxV2V3V0ainfix <=aposition_valueV2V0ainfix >=aposition_valueV2V1Iainfix =V3c0Iainfix >=V3c0F">
......@@ -392,7 +392,7 @@
locfile="../alphaBeta.mlw"
loclnum="121" loccnumb="7" loccnume="15"
expl="1. postcondition"
sum="e50fe264528ad54603548406e9bb093e"
sum="bd104fc8c08908b07ef8a9484e57a399"
proved="true"
expanded="false"
shape="ainfix =aposition_valueV2aminmaxV2V3Iainfix <aminmaxV2V3V1Aainfix <V0aminmaxV2V3Iainfix =V3c0Iainfix >=V3c0F">
......@@ -420,7 +420,7 @@
locfile="../alphaBeta.mlw"
loclnum="121" loccnumb="7" loccnume="15"
expl="2. postcondition"
sum="a1e8321b9aa07cb6bd62c0dcf17267a6"
sum="25e934a301b56793018f8f5a6c1fcbb0"
proved="true"
expanded="false"
shape="ainfix <=aposition_valueV2V0Iainfix <=aminmaxV2V3V0Iainfix <aminmaxV2V3V1Aainfix <V0aminmaxV2V3NIainfix =V3c0Iainfix >=V3c0F">
......@@ -448,7 +448,7 @@
locfile="../alphaBeta.mlw"
loclnum="121" loccnumb="7" loccnume="15"
expl="3. postcondition"
sum="3fe502381e5d642864ff4479130f67c4"
sum="712a396952c0862e9b49f34fbb2490a4"
proved="true"
expanded="false"
shape="ainfix >=aposition_valueV2V1Iainfix <=aminmaxV2V3V0NIainfix <aminmaxV2V3V1Aainfix <V0aminmaxV2V3NIainfix =V3c0Iainfix >=V3c0F">
......@@ -478,7 +478,7 @@
locfile="../alphaBeta.mlw"
loclnum="121" loccnumb="7" loccnume="15"
expl="2. postcondition"
sum="b0f71411555bf6f6a49319b10547e75d"
sum="848484923f90fda7b54b0309d43d9ed9"
proved="true"
expanded="false"
shape="Calegal_movesV2aNiliainfix <aminmaxV2V3V1Aainfix <V0aminmaxV2V3ainfix =aposition_valueV2aminmaxV2V3iainfix <=aminmaxV2V3V0ainfix <=aposition_valueV2V0ainfix >=aposition_valueV2V1aConsVVtIainfix =V3c0NIainfix >=V3c0F">
......@@ -493,7 +493,7 @@
locfile="../alphaBeta.mlw"
loclnum="121" loccnumb="7" loccnume="15"
expl="1. postcondition"
sum="bb8226faf0bc93acf933bd2038b98e23"
sum="85912351fe83419299848e3f5c1982cf"
proved="true"
expanded="false"
shape="Calegal_movesV2aNilainfix =aposition_valueV2aminmaxV2V3Iainfix <aminmaxV2V3V1Aainfix <V0aminmaxV2V3aConsVVtIainfix =V3c0NIainfix >=V3c0F">
......@@ -529,7 +529,7 @@
locfile="../alphaBeta.mlw"
loclnum="121" loccnumb="7" loccnume="15"
expl="2. postcondition"
sum="d180dc50e81f6bdf8edff0ae68aa5e86"
sum="cc20ae36074a4fe51b188d4927f81fae"
proved="true"
expanded="false"
shape="Calegal_movesV2aNilainfix <=aposition_valueV2V0Iainfix <=aminmaxV2V3V0Iainfix <aminmaxV2V3V1Aainfix <V0aminmaxV2V3NaConsVVtIainfix =V3c0NIainfix >=V3c0F">
......@@ -565,7 +565,7 @@
locfile="../alphaBeta.mlw"
loclnum="121" loccnumb="7" loccnume="15"
expl="3. postcondition"
sum="c82d56a4ac016e8839dce0de84018fb8"
sum="506cd4fc7abe3051f3451cd813ebd7e5"
proved="true"
expanded="false"
shape="Calegal_movesV2aNilainfix >=aposition_valueV2V1Iainfix <=aminmaxV2V3V0NIainfix <aminmaxV2V3V1Aainfix <V0aminmaxV2V3NaConsVVtIainfix =V3c0NIainfix >=V3c0F">
......@@ -603,7 +603,7 @@
locfile="../alphaBeta.mlw"
loclnum="121" loccnumb="7" loccnume="15"
expl="3. precondition"
sum="6045211f56a53ac4515749f51e289919"
sum="92416b4cea2ff50735cc4e2e7ab09e11"
proved="true"
expanded="false"
shape="Calegal_movesV2aNiltaConsVVainfix >=V3c1Iainfix =V3c0NIainfix >=V3c0F">
......@@ -639,7 +639,7 @@
locfile="../alphaBeta.mlw"
loclnum="121" loccnumb="7" loccnume="15"
expl="4. postcondition"
sum="640ab76cb472655ce8eaf23073fad568"
sum="9914171d51b71c9ca355479fee156ddf"
proved="false"
expanded="true"
shape="Calegal_movesV2aNiltaConsVViainfix <aminmaxV2V3V1Aainfix <V0aminmaxV2V3ainfix =V6aminmaxV2V3iainfix <=aminmaxV2V3V0ainfix <=V6V0ainfix >=V6V1Iainfix >=V6V1Iiainfix <V7aprefix -V0Aainfix <aprefix -V1V7ainfix =V6aprefix -V7iainfix <=V7aprefix -V1ainfix >=V6V1ainfix <=V6V0Laminmaxado_moveV2V4ainfix -V3c1FIainfix >=V3c1Iainfix =V3c0NIainfix >=V3c0F">
......@@ -651,7 +651,7 @@
locfile="../alphaBeta.mlw"
loclnum="121" loccnumb="7" loccnume="15"
expl="5. precondition"
sum="1e74940031cdea274b38b37a1ddbefa6"
sum="acc7d49d1d594b413ff8ad925ef65895"
proved="true"
expanded="false"
shape="Calegal_movesV2aNiltaConsVVainfix >=V3c1Iainfix >=V6V1NIiainfix <V7aprefix -V0Aainfix <aprefix -V1V7ainfix =V6aprefix -V7iainfix <=V7aprefix -V1ainfix >=V6V1ainfix <=V6V0Laminmaxado_moveV2V4ainfix -V3c1FIainfix >=V3c1Iainfix =V3c0NIainfix >=V3c0F">
......@@ -687,7 +687,7 @@
locfile="../alphaBeta.mlw"
loclnum="121" loccnumb="7" loccnume="15"
expl="6. postcondition"
sum="404e57d028647bc1a7aafe2ad331a326"
sum="600958f14f18d4b436f4e24e405f4c0a"
proved="false"
expanded="true"
shape="Calegal_movesV2aNiltaConsVViainfix <aminmaxV2V3V1Aainfix <V0aminmaxV2V3ainfix =V7aminmaxV2V3iainfix <=aminmaxV2V3V0ainfix <=V7V0ainfix >=V7V1Iiais_emptyV8ainfix =V7V6iainfix <V9V1Aainfix <amaxV6V0V9ainfix =V7V9iainfix <=V9amaxV6V0ainfix <=V7amaxV6V0ainfix >=V7V1LaminaTuple2V2V3V8LaelementsV5FIainfix >=V3c1Iainfix >=V6V1NIiainfix <V10aprefix -V0Aainfix <aprefix -V1V10ainfix =V6aprefix -V10iainfix <=V10aprefix -V1ainfix >=V6V1ainfix <=V6V0Laminmaxado_moveV2V4ainfix -V3c1FIainfix >=V3c1Iainfix =V3c0NIainfix >=V3c0F">
......@@ -701,7 +701,7 @@
locfile="../alphaBeta.mlw"
loclnum="139" loccnumb="7" loccnume="19"
expl="VC for negabeta_rec"
sum="2134e39bfcf18e9393a818ff694e669f"
sum="012d67bc12d6e7a273a74e9f2812db42"
proved="false"
expanded="true"
shape="CV5aNiliainfix <V7V1Aainfix <V0V7ainfix =V4V7iainfix <=V7V0ainfix <=V4V0ainfix >=V4V1LaminaTuple2V2V3V6Iais_emptyV6NLaelementsV5aConsVViainfix >=amaxV10V4V1iais_emptyV11ainfix =amaxV10V4V4iainfix <V12V1Aainfix <V0V12ainfix =amaxV10V4V12iainfix <=V12V0ainfix <=amaxV10V4V0ainfix >=amaxV10V4V1LaminaTuple2V2V3V11LaelementsV5iais_emptyV14ainfix =V13V4iainfix <V15V1Aainfix <V0V15ainfix =V13V15iainfix <=V15V0ainfix <=V13V0ainfix >=V13V1LaminaTuple2V2V3V14LaelementsV5Iiais_emptyV16ainfix =V13amaxV10V4iainfix <V17V1Aainfix <amaxamaxV10V4V0V17ainfix =V13V17iainfix <=V17amaxamaxV10V4V0ainfix <=V13amaxamaxV10V4V0ainfix >=V13V1LaminaTuple2V2V3V16LaelementsV9FAainfix >=V3c1Iiainfix <V18aprefix -V0Aainfix <aprefix -V1V18ainfix =V10aprefix -V18iainfix <=V18aprefix -V1ainfix >=V10V1ainfix <=V10V0Laminmaxado_moveV2V8ainfix -V3c1FAainfix >=V3c1Iainfix >=V3c1F">
......@@ -716,7 +716,7 @@
locfile="../alphaBeta.mlw"
loclnum="139" loccnumb="7" loccnume="19"
expl="1. postcondition"
sum="1eb81ae3bdca869ea154b51098b87a86"
sum="5f601b642bda04bb8d27914557493751"
proved="true"
expanded="false"
shape="CV5aNiliainfix <V7V1Aainfix <V0V7ainfix =V4V7iainfix <=V7V0ainfix <=V4V0ainfix >=V4V1LaminaTuple2V2V3V6Iais_emptyV6NLaelementsV5aConsVVtIainfix >=V3c1F">
......@@ -736,7 +736,7 @@
locfile="../alphaBeta.mlw"
loclnum="139" loccnumb="7" loccnume="19"
expl="2. precondition"
sum="9938059d21c1e699233305535f043a80"
sum="cbe226da784c47693bb2e350a1bdde29"
proved="true"
expanded="false"
shape="CV5aNiltaConsVVainfix >=V3c1Iainfix >=V3c1F">
......@@ -756,7 +756,7 @@
locfile="../alphaBeta.mlw"
loclnum="139" loccnumb="7" loccnume="19"
expl="3. postcondition"
sum="5832ed2d4a603fa5e5e810fc8685468f"
sum="113b98cf818e0719b63f98f415cdaf65"
proved="false"
expanded="true"
shape="CV5aNiltaConsVViais_emptyV9ainfix =amaxV8V4V4iainfix <V10V1Aainfix <V0V10ainfix =amaxV8V4V10iainfix <=V10V0ainfix <=amaxV8V4V0ainfix >=amaxV8V4V1LaminaTuple2V2V3V9LaelementsV5Iainfix >=amaxV8V4V1Iiainfix <V11aprefix -V0Aainfix <aprefix -V1V11ainfix =V8aprefix -V11iainfix <=V11aprefix -V1ainfix >=V8V1ainfix <=V8V0Laminmaxado_moveV2V6ainfix -V3c1FIainfix >=V3c1Iainfix >=V3c1F">
......@@ -768,7 +768,7 @@
locfile="../alphaBeta.mlw"
loclnum="139" loccnumb="7" loccnume="19"
expl="4. precondition"
sum="9eece8d8b9b26a3e2f91ba9a256d056e"
sum="7186098d5475577625401728ddb97ad7"
proved="true"
expanded="false"
shape="CV5aNiltaConsVVainfix >=V3c1Iainfix >=amaxV8V4V1NIiainfix <V9aprefix -V0Aainfix <aprefix -V1V9ainfix =V8aprefix -V9iainfix <=V9aprefix -V1ainfix >=V8V1ainfix <=V8V0Laminmaxado_moveV2V6ainfix -V3c1FIainfix >=V3c1Iainfix >=V3c1F">
......@@ -788,7 +788,7 @@
locfile="../alphaBeta.mlw"
loclnum="139" loccnumb="7" loccnume="19"
expl="5. postcondition"
sum="67ad47c1bd49b82b563963e6cb5fa964"
sum="d931e1fc4b18ce57bbfd25c024d85e14"
proved="false"
expanded="true"
shape="CV5aNiltaConsVViais_emptyV10ainfix =V9V4iainfix <V11V1Aainfix <V0V11ainfix =V9V11iainfix <=V11V0ainfix <=V9V0ainfix >=V9V1LaminaTuple2V2V3V10LaelementsV5Iiais_emptyV12ainfix =V9amaxV8V4iainfix <V13V1Aainfix <amaxamaxV8V4V0V13ainfix =V9V13iainfix <=V13amaxamaxV8V4V0ainfix <=V9amaxamaxV8V4V0ainfix >=V9V1LaminaTuple2V2V3V12LaelementsV7FIainfix >=V3c1Iainfix >=amaxV8V4V1NIiainfix <V14aprefix -V0Aainfix <aprefix -V1V14ainfix =V8aprefix -V14iainfix <=V14aprefix -V1ainfix >=V8V1ainfix <=V8V0Laminmaxado_moveV2V6ainfix -V3c1FIainfix >=V3c1Iainfix >=V3c1F">
......@@ -802,7 +802,7 @@
locfile="../alphaBeta.mlw"
loclnum="161" loccnumb="4" loccnume="14"
expl="VC for alpha_beta"
sum="aefc65a0c9efa1dfbe91c46d1eb0a7e0"
sum="d7c3376ec359790570f411ad399a7c17"
proved="true"
expanded="false"
shape="ainfix =V2aminmaxV0V1Iiainfix <aminmaxV0V1ainfinityAainfix <aprefix -ainfinityaminmaxV0V1ainfix =V2aminmaxV0V1iainfix <=aminmaxV0V1aprefix -ainfinityainfix <=V2aprefix -ainfinityainfix >=V2ainfinityFAainfix >=V1c0Iainfix >=V1c0F">
......
......@@ -24,7 +24,7 @@
locfile="../arm.mlw"
loclnum="16" loccnumb="6" loccnume="20"
expl="VC for insertion_sort"
sum="3ce68aec817c9861b3b7cb459122b9e9"
sum="6152c465572f116cb4cbdb54cec6b773"
proved="false"
expanded="false"
shape="iainfix <=V5c10iainfix <agetV13V11agetV13ainfix -V11c1ainfix <V18V11Aainfix <=c0V11Aainfix <=ainfix *c2V15ainfix +ainfix *ainfix -V5c2ainfix -V5c1ainfix *c2ainfix -V5V18Aainvamk arrayV0V17Aainfix <=V18V5Aainfix <=c1V18Iainfix =V18ainfix -V11c1FIainfix =V17asetV16ainfix -V11c1agetV13V11Aainfix <=c0V0FAainfix <ainfix -V11c1V0Aainfix <=c0ainfix -V11c1Iainfix =V16asetV13V11agetV13ainfix -V11c1Aainfix <=c0V0FAainfix <V11V0Aainfix <=c0V11Aainfix <ainfix -V11c1V0Aainfix <=c0ainfix -V11c1Aainfix <V11V0Aainfix <=c0V11Iainfix =V15ainfix +V12c1Fainfix <ainfix -c10V19ainfix -c10V5Aainfix <=c0ainfix -c10V5Aainfix <=ainfix *c2V12ainfix *ainfix -V19c2ainfix -V19c1Aainfix =V10ainfix -V19c2AainvV14Aainfix <=V19c11Aainfix <=c2V19Iainfix =V19ainfix +V5c1FAainfix <V11V0Aainfix <=c0V11Aainfix <ainfix -V11c1V0Aainfix <=c0ainfix -V11c1Aainfix <=c0V0Iainfix <=ainfix *c2V12ainfix +ainfix *ainfix -V5c2ainfix -V5c1ainfix *c2ainfix -V5V11AainvV14Aainfix <=V11V5Aainfix <=c1V11Lamk arrayV0V13FAainfix <=ainfix *c2V6ainfix +ainfix *ainfix -V5c2ainfix -V5c1ainfix *c2ainfix -V5V5AainvV9Aainfix <=V5V5Aainfix <=c1V5Iainfix =V10ainfix +V7c1Fainfix <=V6c45Aainfix =V7c9Aainfix <=c0V0Iainfix <=ainfix *c2V6ainfix *ainfix -V5c2ainfix -V5c1Aainfix =V7ainfix -V5c2AainvV9Aainfix <=V5c11Aainfix <=c2V5Lamk arrayV0V8FAainfix <=ainfix *c2V1ainfix *ainfix -c2c2ainfix -c2c1Aainfix =V2ainfix -c2c2AainvV4Aainfix <=c2c11Aainfix <=c2c2Iainfix =V1c0Aainfix =V2c0AainvV4Aainfix <=c0V0Lamk arrayV0V3FF">
......@@ -50,7 +50,7 @@
locfile="../arm.mlw"
loclnum="120" loccnumb="6" loccnume="18"
expl="VC for path_init_l2"
sum="38759903d66d93a0badff4ab76c129e6"
sum="492d92d7d4a40e7717e9736c55995716"
proved="true"
expanded="true"
shape="ainv_l2V5V0V2Iainfix =V5amixfix [<-]V1ainfix -V0c16V4FIainfix =V4c2FIainfix =V3c0FIainfix =V2c0FIainvV1AaseparationV0F">
......@@ -78,7 +78,7 @@
locfile="../arm.mlw"
loclnum="127" loccnumb="6" loccnume="18"
expl="VC for path_l2_exit"
sum="548a1717c3f91ea68d3cbefc909a77e8"
sum="60875edac419a47f205013458f0c3aaa"
proved="true"
expanded="true"
shape="ainfix =V0c9Iainfix =V4aFalseIainfix <=V3c10qainfix =V4aTrueFIainfix =V3amixfix []V2ainfix -V1c16FIainv_l2V2V1V0AaseparationV1F">
......
......@@ -24,7 +24,7 @@
locfile="../assigning_meanings_to_programs.mlw"
loclnum="12" loccnumb="6" loccnume="9"
expl="VC for sum"
sum="778c6a7d6061eaf3c7f1c356d13dc553"
sum="e5449116862cde6a2205cd02a7dd9c87"
proved="true"
expanded="true"
shape="iainfix <=V4V1ainfix <ainfix -V1V6ainfix -V1V4Aainfix <=c0ainfix -V1V4Aainfix =V5asumV2c1V6Aainfix <=V6ainfix +V1c1Aainfix <=c1V6Iainfix =V6ainfix +V4c1FIainfix =V5ainfix +V3agetV2V4FAainfix <V4V0Aainfix <=c0V4ainfix =V3asumV2c1ainfix +V1c1Iainfix =V3asumV2c1V4Aainfix <=V4ainfix +V1c1Aainfix <=c1V4FAainfix =c0asumV2c1c1Aainfix <=c1ainfix +V1c1Aainfix <=c1c1Iainfix <V1V0Aainfix <=c0V1Aainfix <=c0V0FF">
......@@ -51,7 +51,7 @@
locfile="../assigning_meanings_to_programs.mlw"
loclnum="38" loccnumb="6" loccnume="14"
expl="VC for division"
sum="d1489af014bd44c27d427a8d972c2927"
sum="ccffd2d7ddad41347cee5271c0a9084a"
proved="true"
expanded="true"
shape="iainfix >=V2V1ainfix <V4V2Aainfix <=c0V2Aainfix =V0ainfix +ainfix *V5V1V4Aainfix <=c0V4Iainfix =V5ainfix +V3c1FIainfix =V4ainfix -V2V1Fainfix =V0ainfix +ainfix *V3V1V2Aainfix <V2V1Aainfix <=c0V2Iainfix =V0ainfix +ainfix *V3V1V2Aainfix <=c0V2FAainfix =V0ainfix +ainfix *c0V1V0Aainfix <=c0V0Iainfix <c0V1Aainfix <=c0V0F">
......
This diff is collapsed.
......@@ -24,7 +24,7 @@
locfile="../binary_search.mlw"
loclnum="17" loccnumb="6" loccnume="19"
expl="VC for binary_search"
sum="498abc049035c58ab372d0afa0f32a72"
sum="bf18b515f2c894d5db932ad78fee5634"
proved="true"
expanded="true"
shape="iainfix <=V4V3iainfix <agetV2ainfix +V4adivainfix -V3V4c2V1ainfix <ainfix -V3V5ainfix -V3V4Aainfix <=c0ainfix -V3V4Aainfix <=V6V3Aainfix <=V5V6Iainfix =agetV2V6V1Iainfix <V6V0Aainfix <=c0V6FAainfix <V3V0Aainfix <=c0V5Iainfix =V5ainfix +ainfix +V4adivainfix -V3V4c2c1Fiainfix >agetV2ainfix +V4adivainfix -V3V4c2V1ainfix <ainfix -V7V4ainfix -V3V4Aainfix <=c0ainfix -V3V4Aainfix <=V8V7Aainfix <=V4V8Iainfix =agetV2V8V1Iainfix <V8V0Aainfix <=c0V8FAainfix <V7V0Aainfix <=c0V4Iainfix =V7ainfix -ainfix +V4adivainfix -V3V4c2c1Fainfix =agetV2ainfix +V4adivainfix -V3V4c2V1Aainfix <ainfix +V4adivainfix -V3V4c2V0Aainfix <=c0ainfix +V4adivainfix -V3V4c2Aainfix <ainfix +V4adivainfix -V3V4c2V0Aainfix <=c0ainfix +V4adivainfix -V3V4c2Aainfix <ainfix +V4adivainfix -V3V4c2V0Aainfix <=c0ainfix +V4adivainfix -V3V4c2Aainfix <=ainfix +V4adivainfix -V3V4c2V3Aainfix <=V4ainfix +V4adivainfix -V3V4c2ainfix =agetV2V9V1NIainfix <V9V0Aainfix <=c0V9FIainfix <=V10V3Aainfix <=V4V10Iainfix =agetV2V10V1Iainfix <V10V0Aainfix <=c0V10FAainfix <V3V0Aainfix <=c0V4FAainfix <=V11ainfix -V0c1Aainfix <=c0V11Iainfix =agetV2V11V1Iainfix <V11V0Aainfix <=c0V11FAainfix <ainfix -V0c1V0Aainfix <=c0c0Iainfix <=agetV2V12agetV2V13Iainfix <V13V0Aainfix <=V12V13Aainfix <=c0V12FAainfix <=c0V0FF">
......@@ -59,7 +59,7 @@
locfile="../binary_search.mlw"
loclnum="60" loccnumb="6" loccnume="19"
expl="VC for binary_search"
sum="bc045587c8509311b2f5f1930d15e6e0"
sum="879ca87287941f4aa56da3ad6004b34c"
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......@@ -86,7 +86,7 @@
locfile="../binary_search.mlw"
loclnum="100" loccnumb="6" loccnume="19"
expl="VC for binary_search"
sum="6bcb889256f3f37a88157c5954e4de7e"
sum="125dc9e9bac17f79389aa05e99948642"
proved="true"
expanded="true"
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......
......@@ -24,7 +24,7 @@
locfile="../binary_sqrt.mlw"
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expl="VC for sqrt"
sum="4882bdabea8a2636d8e122a117a31162"
sum="fbe8d4cdd0fda0789cc75fd2d45c4b8a"
proved="true"
expanded="true"
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......@@ -39,7 +39,7 @@
locfile="../binary_sqrt.mlw"
loclnum="11" loccnumb="10" loccnume="14"
expl="1. postcondition"
sum="d8ca659162fbee16af4ba06ea2838ed3"
sum="80f929942ef3003403011f6d530d8929"
proved="true"
expanded="true"
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......@@ -59,7 +59,7 @@
locfile="../binary_sqrt.mlw"
loclnum="11" loccnumb="10" loccnume="14"
expl="2. precondition"
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sum="0ef06faae32360da6c2c5b5b0ae7fc16"
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......@@ -79,7 +79,7 @@
locfile="../binary_sqrt.mlw"
loclnum="11" loccnumb="10" loccnume="14"
expl="3. postcondition"
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sum="e722c9edee4c20a09eaded8c428b3cb1"
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expanded="true"
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......
......@@ -50,7 +50,7 @@
name="nth_one1"
locfile="../double.why"
loclnum="73" loccnumb="8" loccnume="16"
sum="6acc46a6bdc29e81f0037184dd736481"
sum="d741dc4a8864da5f762e6b4c9e216431"
proved="true"
expanded="true"
shape="ainfix =anthaoneV0aFalseIainfix <=V0c51Aainfix <=c0V0F">
......@@ -75,7 +75,7 @@
name="nth_one2"
locfile="../double.why"
loclnum="74" loccnumb="8" loccnume="16"
sum="4d04ad44d9bf8c21c68b76deba4a5d2f"
sum="82db89598d55d5fc2523ad127118d0f3"
proved="true"
expanded="true"
shape="ainfix =anthaoneV0aTrueIainfix <=V0c61Aainfix <=c52V0F">
......@@ -100,7 +100,7 @@
name="nth_one3"
locfile="../double.why"
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shape="ainfix =anthaoneV0aFalseIainfix <=V0c63Aainfix <=c62V0F">
......@@ -117,7 +117,7 @@
name="sign_one"
locfile="../double.why"
loclnum="77" loccnumb="8" loccnume="16"
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sum="0e40a7449cdd9cd757fe90de11326100"
proved="true"
expanded="false"
shape="ainfix =asignaoneaFalse">
......@@ -166,7 +166,7 @@
name="exp_one"
locfile="../double.why"
loclnum="78" loccnumb="8" loccnume="15"
sum="1cd057151de1a592adba69c9e27bac60"
sum="04f04c76f65ba3a4cd9f0dfb813700e8"
proved="true"
expanded="false"
shape="ainfix =aexpaonec1023">
......@@ -192,7 +192,7 @@
name="mantissa_one"
locfile="../double.why"
loclnum="79" loccnumb="8" loccnume="20"
sum="c23b56569cc531b441a1c2a8ef130c43"
sum="5565b958517fda2ea188aebd58fcbe3a"
proved="true"
expanded="false"
shape="ainfix =amantissaaonec0">
......@@ -225,7 +225,7 @@
name="double_value_of_1"
locfile="../double.why"
loclnum="81" loccnumb="8" loccnume="25"
sum="78917c4d447811c962b1df6319c3c1af"
sum="cfde4189a06549a716415b04a6741ede"
proved="true"
expanded="false"
shape="ainfix =adouble_of_bv64aonec1.0">
......
......@@ -35,7 +35,7 @@
name="Nth_j"
locfile="../neg_as_xor.why"
loclnum="13" loccnumb="8" loccnume="13"
sum="59c65c1845d15d0de27cd1f43c7f68a4"
sum="867cfc6f0844a2813914e1bb330e27d0"
proved="true"
expanded="true"
shape="ainfix =anthajV0aFalseIainfix <=V0c62Aainfix <=c0V0F">
......@@ -60,7 +60,7 @@
name="sign_of_j"
locfile="../neg_as_xor.why"
loclnum="15" loccnumb="8" loccnume="17"
sum="690abcb5f0314734e961681d973a3b38"
sum="dd02f5f43382c4ceced221805af649dd"
proved="true"
expanded="false"
shape="ainfix =asignajaTrue">
......@@ -77,7 +77,7 @@
name="mantissa_of_j"
locfile="../neg_as_xor.why"
loclnum="16" loccnumb="8" loccnume="21"
sum="9fd633e9ee615783a4362e3d9106ad98"
sum="29f66aac078857c3b74a607f2009e1d7"
proved="true"
expanded="false"
shape="ainfix =amantissaajc0">
......@@ -110,7 +110,7 @@
name="exp_of_j"
locfile="../neg_as_xor.why"
loclnum="17" loccnumb="8" loccnume="16"
sum="6ef36783b5317908cd0424858a5b32e5"
sum="4bffb7900324096b7f864e9762cdde4d"
proved="true"
expanded="false"
shape="ainfix =aexpajc0">
......@@ -136,14 +136,14 @@
memlimit="1000"
obsolete=