Commit 9bf1998f authored by Andrei Paskevich's avatar Andrei Paskevich

update sessions (in progress)

parent ac976a84
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...@@ -28,7 +28,7 @@ ...@@ -28,7 +28,7 @@
locfile="../algo64.mlw" locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19" loclnum="37" loccnumb="10" loccnume="19"
expl="VC for quicksort" expl="VC for quicksort"
sum="ab2a63ccffd01ef10ebb7dc0e7571df9" sum="58fde39b3de57a13ada8d66fc6adb75e"
proved="true" proved="true"
expanded="true" expanded="true"
shape="iasorted_subV3V1ainfix +V2c1Aapermut_subV3V3V1ainfix +V2c1asorted_subV8V1ainfix +V2c1Aapermut_subV3V8V1ainfix +V2c1Aapermut_subV7V8V1ainfix +V2c1Iasorted_subV8V5ainfix +V2c1Aapermut_subV7V8V5ainfix +V2c1Aainfix <=c0V0FAainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Aainfix <ainfix -V2V5ainfix -V2V1Aainfix <=c0ainfix -V2V1Aapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FAainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Aainfix <ainfix -V4V1ainfix -V2V1Aainfix <=c0ainfix -V2V1Iainfix >=agetV6V10V9Iainfix <=V10V2Aainfix <=V5V10FAainfix =agetV6V11V9Iainfix <V11V5Aainfix <V4V11FAainfix <=agetV6V12V9Iainfix <=V12V4Aainfix <=V1V12FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FAainfix <V2V0Aainfix <V1V2Aainfix <=c0V1ainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF"> shape="iasorted_subV3V1ainfix +V2c1Aapermut_subV3V3V1ainfix +V2c1asorted_subV8V1ainfix +V2c1Aapermut_subV3V8V1ainfix +V2c1Aapermut_subV7V8V1ainfix +V2c1Iasorted_subV8V5ainfix +V2c1Aapermut_subV7V8V5ainfix +V2c1Aainfix <=c0V0FAainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Aainfix <ainfix -V2V5ainfix -V2V1Aainfix <=c0ainfix -V2V1Aapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FAainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Aainfix <ainfix -V4V1ainfix -V2V1Aainfix <=c0ainfix -V2V1Iainfix >=agetV6V10V9Iainfix <=V10V2Aainfix <=V5V10FAainfix =agetV6V11V9Iainfix <V11V5Aainfix <V4V11FAainfix <=agetV6V12V9Iainfix <=V12V4Aainfix <=V1V12FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FAainfix <V2V0Aainfix <V1V2Aainfix <=c0V1ainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
...@@ -43,7 +43,7 @@ ...@@ -43,7 +43,7 @@
locfile="../algo64.mlw" locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19" loclnum="37" loccnumb="10" loccnume="19"
expl="1. precondition" expl="1. precondition"
sum="153b0a4ec87c1b7e4f4d4bc2ccec7568" sum="3c43f6f2c8269df69c948249e7e1e382"
proved="true" proved="true"
expanded="true" expanded="true"
shape="preconditionainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF"> shape="preconditionainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
...@@ -63,7 +63,7 @@ ...@@ -63,7 +63,7 @@
locfile="../algo64.mlw" locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19" loclnum="37" loccnumb="10" loccnume="19"
expl="2. variant decrease" expl="2. variant decrease"
sum="d52fa8437c333e33dfcab95b688273a1" sum="e4af12d56325fd83d45591296cbe3447"
proved="true" proved="true"
expanded="true" expanded="true"
shape="variant decreaseainfix <ainfix -V4V1ainfix -V2V1Aainfix <=c0ainfix -V2V1Iainfix >=agetV6V8V7Iainfix <=V8V2Aainfix <=V5V8FAainfix =agetV6V9V7Iainfix <V9V5Aainfix <V4V9FAainfix <=agetV6V10V7Iainfix <=V10V4Aainfix <=V1V10FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF"> shape="variant decreaseainfix <ainfix -V4V1ainfix -V2V1Aainfix <=c0ainfix -V2V1Iainfix >=agetV6V8V7Iainfix <=V8V2Aainfix <=V5V8FAainfix =agetV6V9V7Iainfix <V9V5Aainfix <V4V9FAainfix <=agetV6V10V7Iainfix <=V10V4Aainfix <=V1V10FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
...@@ -83,7 +83,7 @@ ...@@ -83,7 +83,7 @@
locfile="../algo64.mlw" locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19" loclnum="37" loccnumb="10" loccnume="19"
expl="3. precondition" expl="3. precondition"
sum="d824dc170165d3d1bd7f3e8aa5e84688" sum="6b486a7a19953085f8a449593e49e9e3"
proved="true" proved="true"
expanded="true" expanded="true"
shape="preconditionainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V8V7Iainfix <=V8V2Aainfix <=V5V8FAainfix =agetV6V9V7Iainfix <V9V5Aainfix <V4V9FAainfix <=agetV6V10V7Iainfix <=V10V4Aainfix <=V1V10FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF"> shape="preconditionainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V8V7Iainfix <=V8V2Aainfix <=V5V8FAainfix =agetV6V9V7Iainfix <V9V5Aainfix <V4V9FAainfix <=agetV6V10V7Iainfix <=V10V4Aainfix <=V1V10FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
...@@ -103,7 +103,7 @@ ...@@ -103,7 +103,7 @@
locfile="../algo64.mlw" locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19" loclnum="37" loccnumb="10" loccnume="19"
expl="4. assertion" expl="4. assertion"
sum="a2985e78ef08b400f95948a9160374ea" sum="b203e24ff20076cb2659b3454a5a6012"
proved="true" proved="true"
expanded="true" expanded="true"
shape="assertionapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V9V8Iainfix <=V9V2Aainfix <=V5V9FAainfix =agetV6V10V8Iainfix <V10V5Aainfix <V4V10FAainfix <=agetV6V11V8Iainfix <=V11V4Aainfix <=V1V11FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF"> shape="assertionapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V9V8Iainfix <=V9V2Aainfix <=V5V9FAainfix =agetV6V10V8Iainfix <V10V5Aainfix <V4V10FAainfix <=agetV6V11V8Iainfix <=V11V4Aainfix <=V1V11FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
...@@ -123,7 +123,7 @@ ...@@ -123,7 +123,7 @@
locfile="../algo64.mlw" locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19" loclnum="37" loccnumb="10" loccnume="19"
expl="5. variant decrease" expl="5. variant decrease"
sum="f1c89158dd889a67f6ec2b53de972207" sum="6cf15418ef8d15af54e3962c629dabd3"
proved="true" proved="true"
expanded="true" expanded="true"
shape="variant decreaseainfix <ainfix -V2V5ainfix -V2V1Aainfix <=c0ainfix -V2V1Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V9V8Iainfix <=V9V2Aainfix <=V5V9FAainfix =agetV6V10V8Iainfix <V10V5Aainfix <V4V10FAainfix <=agetV6V11V8Iainfix <=V11V4Aainfix <=V1V11FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF"> shape="variant decreaseainfix <ainfix -V2V5ainfix -V2V1Aainfix <=c0ainfix -V2V1Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V9V8Iainfix <=V9V2Aainfix <=V5V9FAainfix =agetV6V10V8Iainfix <V10V5Aainfix <V4V10FAainfix <=agetV6V11V8Iainfix <=V11V4Aainfix <=V1V11FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
...@@ -143,7 +143,7 @@ ...@@ -143,7 +143,7 @@
locfile="../algo64.mlw" locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19" loclnum="37" loccnumb="10" loccnume="19"
expl="6. precondition" expl="6. precondition"
sum="74c8e5dfdcaff3e9e3b7cf11e06af710" sum="a1a8658fb645764ad38241ce182e9b8a"
proved="true" proved="true"
expanded="true" expanded="true"
shape="preconditionainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V9V8Iainfix <=V9V2Aainfix <=V5V9FAainfix =agetV6V10V8Iainfix <V10V5Aainfix <V4V10FAainfix <=agetV6V11V8Iainfix <=V11V4Aainfix <=V1V11FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF"> shape="preconditionainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V9V8Iainfix <=V9V2Aainfix <=V5V9FAainfix =agetV6V10V8Iainfix <V10V5Aainfix <V4V10FAainfix <=agetV6V11V8Iainfix <=V11V4Aainfix <=V1V11FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
...@@ -163,7 +163,7 @@ ...@@ -163,7 +163,7 @@
locfile="../algo64.mlw" locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19" loclnum="37" loccnumb="10" loccnume="19"
expl="7. assertion" expl="7. assertion"
sum="ffc073f16103d696d99568ec5ba9f74a" sum="d4c5f783e016831c9b4150a9a837996b"
proved="true" proved="true"
expanded="true" expanded="true"
shape="assertionapermut_subV7V8V1ainfix +V2c1Iasorted_subV8V5ainfix +V2c1Aapermut_subV7V8V5ainfix +V2c1Aainfix <=c0V0FIainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V10V9Iainfix <=V10V2Aainfix <=V5V10FAainfix =agetV6V11V9Iainfix <V11V5Aainfix <V4V11FAainfix <=agetV6V12V9Iainfix <=V12V4Aainfix <=V1V12FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF"> shape="assertionapermut_subV7V8V1ainfix +V2c1Iasorted_subV8V5ainfix +V2c1Aapermut_subV7V8V5ainfix +V2c1Aainfix <=c0V0FIainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V10V9Iainfix <=V10V2Aainfix <=V5V10FAainfix =agetV6V11V9Iainfix <V11V5Aainfix <V4V11FAainfix <=agetV6V12V9Iainfix <=V12V4Aainfix <=V1V12FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
...@@ -183,7 +183,7 @@ ...@@ -183,7 +183,7 @@
locfile="../algo64.mlw" locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19" loclnum="37" loccnumb="10" loccnume="19"
expl="8. postcondition" expl="8. postcondition"
sum="08fdd2672d24fafbe0f05ee5f635f6e9" sum="7b2272981678c505d00d003541a25323"
proved="true" proved="true"
expanded="true" expanded="true"
shape="postconditionapermut_subV3V8V1ainfix +V2c1Iapermut_subV7V8V1ainfix +V2c1Iasorted_subV8V5ainfix +V2c1Aapermut_subV7V8V5ainfix +V2c1Aainfix <=c0V0FIainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V10V9Iainfix <=V10V2Aainfix <=V5V10FAainfix =agetV6V11V9Iainfix <V11V5Aainfix <V4V11FAainfix <=agetV6V12V9Iainfix <=V12V4Aainfix <=V1V12FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF"> shape="postconditionapermut_subV3V8V1ainfix +V2c1Iapermut_subV7V8V1ainfix +V2c1Iasorted_subV8V5ainfix +V2c1Aapermut_subV7V8V5ainfix +V2c1Aainfix <=c0V0FIainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V10V9Iainfix <=V10V2Aainfix <=V5V10FAainfix =agetV6V11V9Iainfix <V11V5Aainfix <V4V11FAainfix <=agetV6V12V9Iainfix <=V12V4Aainfix <=V1V12FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
...@@ -203,7 +203,7 @@ ...@@ -203,7 +203,7 @@
locfile="../algo64.mlw" locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19" loclnum="37" loccnumb="10" loccnume="19"
expl="9. postcondition" expl="9. postcondition"
sum="35ebeae2f5fbe5224561cff570ab23b9" sum="39cbb1c21ab896a97d894567ed414a90"
proved="true" proved="true"
expanded="true" expanded="true"
shape="postconditionasorted_subV8V1ainfix +V2c1Iapermut_subV7V8V1ainfix +V2c1Iasorted_subV8V5ainfix +V2c1Aapermut_subV7V8V5ainfix +V2c1Aainfix <=c0V0FIainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V10V9Iainfix <=V10V2Aainfix <=V5V10FAainfix =agetV6V11V9Iainfix <V11V5Aainfix <V4V11FAainfix <=agetV6V12V9Iainfix <=V12V4Aainfix <=V1V12FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF"> shape="postconditionasorted_subV8V1ainfix +V2c1Iapermut_subV7V8V1ainfix +V2c1Iasorted_subV8V5ainfix +V2c1Aapermut_subV7V8V5ainfix +V2c1Aainfix <=c0V0FIainfix <V2V0Aainfix <=V5V2Aainfix <=c0V5Iapermut_subV6V7V1ainfix +V2c1Iasorted_subV7V1ainfix +V4c1Aapermut_subV6V7V1ainfix +V4c1Aainfix <=c0V0FIainfix <V4V0Aainfix <=V1V4Aainfix <=c0V1Iainfix >=agetV6V10V9Iainfix <=V10V2Aainfix <=V5V10FAainfix =agetV6V11V9Iainfix <V11V5Aainfix <V4V11FAainfix <=agetV6V12V9Iainfix <=V12V4Aainfix <=V1V12FEAapermut_subV3V6V1ainfix +V2c1Aainfix <=V5V2Aainfix <V4V5Aainfix <=V1V4Aainfix <=c0V0FIainfix <V2V0Aainfix <V1V2Aainfix <=c0V1Iainfix <V1V2Iainfix <V2V0Aainfix <=V1V2Aainfix <=c0V1Aainfix <=c0V0FF">
...@@ -223,7 +223,7 @@ ...@@ -223,7 +223,7 @@
memlimit="1000" memlimit="1000"
obsolete="false" obsolete="false"
archived="false"> archived="false">
<result status="valid" time="36.92"/> <result status="valid" time="16.52"/>
</proof> </proof>
</goal> </goal>
<goal <goal
...@@ -231,7 +231,7 @@ ...@@ -231,7 +231,7 @@
locfile="../algo64.mlw" locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19" loclnum="37" loccnumb="10" loccnume="19"
expl="10. postcondition" expl="10. postcondition"
sum="e6bf165a8862cc0215e1fe933570e6fe" sum="c9aee77b1de0f789e80a8d6207e238a8"
proved="true" proved="true"
expanded="true" expanded="true"
shape="postconditionapermut_subV3V3V1ainfix +V2c1INainfix &lt;V1V2Iainfix &lt;V2V0Aainfix &lt;=V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF"> shape="postconditionapermut_subV3V3V1ainfix +V2c1INainfix &lt;V1V2Iainfix &lt;V2V0Aainfix &lt;=V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
...@@ -251,7 +251,7 @@ ...@@ -251,7 +251,7 @@
locfile="../algo64.mlw" locfile="../algo64.mlw"
loclnum="37" loccnumb="10" loccnume="19" loclnum="37" loccnumb="10" loccnume="19"
expl="11. postcondition" expl="11. postcondition"
sum="07f6b005264964017be91678f79e1b36" sum="324cbdea9c2d639c2179bcbffb508f78"
proved="true" proved="true"
expanded="true" expanded="true"
shape="postconditionasorted_subV3V1ainfix +V2c1INainfix &lt;V1V2Iainfix &lt;V2V0Aainfix &lt;=V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF"> shape="postconditionasorted_subV3V1ainfix +V2c1INainfix &lt;V1V2Iainfix &lt;V2V0Aainfix &lt;=V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......
This diff is collapsed.
This diff is collapsed.
...@@ -24,7 +24,7 @@ ...@@ -24,7 +24,7 @@
locfile="../arm.mlw" locfile="../arm.mlw"
loclnum="16" loccnumb="6" loccnume="20" loclnum="16" loccnumb="6" loccnume="20"
expl="VC for insertion_sort" expl="VC for insertion_sort"
sum="5677a170e9f6faf600b34c4281eebd63" sum="ff4534d299565274c09d1a7200c24c10"
proved="false" proved="false"
expanded="false" expanded="false"
shape="iainfix &lt;=V6c45Aainfix =V7c9Aainfix &lt;=c0V0iainfix &lt;ainfix -c10V16ainfix -c10V5Aainfix &lt;=c0ainfix -c10V5Aainfix &lt;=ainfix *c2V12ainfix *ainfix -V16c2ainfix -V16c1Aainfix =V10ainfix -V16c2AainvV14Aainfix &lt;=V16c11Aainfix &lt;=c2V16Iainfix =V16ainfix +V5c1Fainfix &lt;V22V11Aainfix &lt;=c0V11Aainfix &lt;=ainfix *c2V17ainfix +ainfix *ainfix -V5c2ainfix -V5c1ainfix *c2ainfix -V5V22Aainvamk arrayV0V21Aainfix &lt;=V22V5Aainfix &lt;=c1V22Iainfix =V22ainfix -V11c1FIainfix =V21asetV19V20agetV13V11Aainfix &lt;=c0V0FAainfix &lt;V20V0Aainfix &lt;=c0V20Lainfix -V11c1Iainfix =V19asetV13V11agetV13V18Aainfix &lt;=c0V0FAainfix &lt;V11V0Aainfix &lt;=c0V11Aainfix &lt;V18V0Aainfix &lt;=c0V18Lainfix -V11c1Aainfix &lt;V11V0Aainfix &lt;=c0V11Iainfix =V17ainfix +V12c1Fainfix &lt;agetV13V11agetV13V15Aainfix &lt;V11V0Aainfix &lt;=c0V11Aainfix &lt;V15V0Aainfix &lt;=c0V15Aainfix &lt;=c0V0Lainfix -V11c1Iainfix &lt;=ainfix *c2V12ainfix +ainfix *ainfix -V5c2ainfix -V5c1ainfix *c2ainfix -V5V11AainvV14Aainfix &lt;=V11V5Aainfix &lt;=c1V11Lamk arrayV0V13FAainfix &lt;=ainfix *c2V6ainfix +ainfix *ainfix -V5c2ainfix -V5c1ainfix *c2ainfix -V5V5AainvV9Aainfix &lt;=V5V5Aainfix &lt;=c1V5Iainfix =V10ainfix +V7c1Fainfix &lt;=V5c10Iainfix &lt;=ainfix *c2V6ainfix *ainfix -V5c2ainfix -V5c1Aainfix =V7ainfix -V5c2AainvV9Aainfix &lt;=V5c11Aainfix &lt;=c2V5Lamk arrayV0V8FAainfix &lt;=ainfix *c2V1ainfix *ainfix -c2c2ainfix -c2c1Aainfix =V2ainfix -c2c2AainvV4Aainfix &lt;=c2c11Aainfix &lt;=c2c2Iainfix =V1c0Aainfix =V2c0AainvV4Aainfix &lt;=c0V0Lamk arrayV0V3FF"> shape="iainfix &lt;=V6c45Aainfix =V7c9Aainfix &lt;=c0V0iainfix &lt;ainfix -c10V16ainfix -c10V5Aainfix &lt;=c0ainfix -c10V5Aainfix &lt;=ainfix *c2V12ainfix *ainfix -V16c2ainfix -V16c1Aainfix =V10ainfix -V16c2AainvV14Aainfix &lt;=V16c11Aainfix &lt;=c2V16Iainfix =V16ainfix +V5c1Fainfix &lt;V22V11Aainfix &lt;=c0V11Aainfix &lt;=ainfix *c2V17ainfix +ainfix *ainfix -V5c2ainfix -V5c1ainfix *c2ainfix -V5V22Aainvamk arrayV0V21Aainfix &lt;=V22V5Aainfix &lt;=c1V22Iainfix =V22ainfix -V11c1FIainfix =V21asetV19V20agetV13V11Aainfix &lt;=c0V0FAainfix &lt;V20V0Aainfix &lt;=c0V20Lainfix -V11c1Iainfix =V19asetV13V11agetV13V18Aainfix &lt;=c0V0FAainfix &lt;V11V0Aainfix &lt;=c0V11Aainfix &lt;V18V0Aainfix &lt;=c0V18Lainfix -V11c1Aainfix &lt;V11V0Aainfix &lt;=c0V11Iainfix =V17ainfix +V12c1Fainfix &lt;agetV13V11agetV13V15Aainfix &lt;V11V0Aainfix &lt;=c0V11Aainfix &lt;V15V0Aainfix &lt;=c0V15Aainfix &lt;=c0V0Lainfix -V11c1Iainfix &lt;=ainfix *c2V12ainfix +ainfix *ainfix -V5c2ainfix -V5c1ainfix *c2ainfix -V5V11AainvV14Aainfix &lt;=V11V5Aainfix &lt;=c1V11Lamk arrayV0V13FAainfix &lt;=ainfix *c2V6ainfix +ainfix *ainfix -V5c2ainfix -V5c1ainfix *c2ainfix -V5V5AainvV9Aainfix &lt;=V5V5Aainfix &lt;=c1V5Iainfix =V10ainfix +V7c1Fainfix &lt;=V5c10Iainfix &lt;=ainfix *c2V6ainfix *ainfix -V5c2ainfix -V5c1Aainfix =V7ainfix -V5c2AainvV9Aainfix &lt;=V5c11Aainfix &lt;=c2V5Lamk arrayV0V8FAainfix &lt;=ainfix *c2V1ainfix *ainfix -c2c2ainfix -c2c1Aainfix =V2ainfix -c2c2AainvV4Aainfix &lt;=c2c11Aainfix &lt;=c2c2Iainfix =V1c0Aainfix =V2c0AainvV4Aainfix &lt;=c0V0Lamk arrayV0V3FF">
...@@ -50,7 +50,7 @@ ...@@ -50,7 +50,7 @@
locfile="../arm.mlw" locfile="../arm.mlw"
loclnum="120" loccnumb="6" loccnume="18" loclnum="120" loccnumb="6" loccnume="18"
expl="VC for path_init_l2" expl="VC for path_init_l2"
sum="19ae2913cea5458fb6929fc9f238efaf" sum="a673c6b14e3f66097ab6521a75fc2975"
proved="true" proved="true"
expanded="true" expanded="true"
shape="ainv_l2V5V0V2Iainfix =V5amixfix [&lt;-]V1ainfix -V0c16V4FIainfix =V4c2FIainfix =V3c0FIainfix =V2c0FIainvV1AaseparationV0F"> shape="ainv_l2V5V0V2Iainfix =V5amixfix [&lt;-]V1ainfix -V0c16V4FIainfix =V4c2FIainfix =V3c0FIainfix =V2c0FIainvV1AaseparationV0F">
...@@ -70,7 +70,7 @@ ...@@ -70,7 +70,7 @@
memlimit="1000" memlimit="1000"
obsolete="false" obsolete="false"
archived="false"> archived="false">
<result status="valid" time="0.02"/> <result status="valid" time="0.14"/>
</proof> </proof>
</goal> </goal>
<goal <goal
...@@ -78,7 +78,7 @@ ...@@ -78,7 +78,7 @@
locfile="../arm.mlw" locfile="../arm.mlw"
loclnum="127" loccnumb="6" loccnume="18" loclnum="127" loccnumb="6" loccnume="18"
expl="VC for path_l2_exit" expl="VC for path_l2_exit"
sum="bca45c9a7ef7fbe8792f11db8c6319ef" sum="850b762a046fc7dd2686d4a5b7033244"
proved="true" proved="true"
expanded="true" expanded="true"
shape="ainfix =V0c9Iainfix =V4aFalseIainfix &lt;=V3c10qainfix =V4aTrueFIainfix =V3amixfix []V2ainfix -V1c16FIainv_l2V2V1V0AaseparationV1F"> shape="ainfix =V0c9Iainfix =V4aFalseIainfix &lt;=V3c10qainfix =V4aTrueFIainfix =V3amixfix []V2ainfix -V1c16FIainv_l2V2V1V0AaseparationV1F">
......
...@@ -24,7 +24,7 @@ ...@@ -24,7 +24,7 @@
locfile="../assigning_meanings_to_programs.mlw" locfile="../assigning_meanings_to_programs.mlw"
loclnum="12" loccnumb="6" loccnume="9" loclnum="12" loccnumb="6" loccnume="9"
expl="VC for sum" expl="VC for sum"
sum="17bf6dcb57a723007ce152bd4c333f35" sum="e0ca4e8622864551ab60bb029148376f"
proved="true" proved="true"
expanded="true" expanded="true"
shape="iainfix =V3asumV2c1ainfix +V1c1ainfix &lt;ainfix -V1V6ainfix -V1V4Aainfix &lt;=c0ainfix -V1V4Aainfix =V5asumV2c1V6Aainfix &lt;=V6ainfix +V1c1Aainfix &lt;=c1V6Iainfix =V6ainfix +V4c1FIainfix =V5ainfix +V3agetV2V4FAainfix &lt;V4V0Aainfix &lt;=c0V4ainfix &lt;=V4V1Iainfix =V3asumV2c1V4Aainfix &lt;=V4ainfix +V1c1Aainfix &lt;=c1V4FAainfix =c0asumV2c1c1Aainfix &lt;=c1ainfix +V1c1Aainfix &lt;=c1c1Iainfix &lt;V1V0Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF"> shape="iainfix =V3asumV2c1ainfix +V1c1ainfix &lt;ainfix -V1V6ainfix -V1V4Aainfix &lt;=c0ainfix -V1V4Aainfix =V5asumV2c1V6Aainfix &lt;=V6ainfix +V1c1Aainfix &lt;=c1V6Iainfix =V6ainfix +V4c1FIainfix =V5ainfix +V3agetV2V4FAainfix &lt;V4V0Aainfix &lt;=c0V4ainfix &lt;=V4V1Iainfix =V3asumV2c1V4Aainfix &lt;=V4ainfix +V1c1Aainfix &lt;=c1V4FAainfix =c0asumV2c1c1Aainfix &lt;=c1ainfix +V1c1Aainfix &lt;=c1c1Iainfix &lt;V1V0Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......
This diff is collapsed.
...@@ -24,7 +24,7 @@ ...@@ -24,7 +24,7 @@
locfile="../binary_search.mlw" locfile="../binary_search.mlw"
loclnum="17" loccnumb="6" loccnume="19" loclnum="17" loccnumb="6" loccnume="19"
expl="VC for binary_search" expl="VC for binary_search"
sum="58d7f9baa3142a5765eb3ebc3538afbb" sum="56a7828114cad28fdbf0f3086ba665f0"
proved="true" proved="true"
expanded="true" expanded="true"
shape="iNainfix =agetV2V5V1Iainfix &lt;V5V0Aainfix &lt;=c0V5Fiiainfix =agetV2V6V1Aainfix &lt;V6V0Aainfix &lt;=c0V6ainfix &lt;ainfix -V7V4ainfix -V3V4Aainfix &lt;=c0ainfix -V3V4Aainfix &lt;=V8V7Aainfix &lt;=V4V8Iainfix =agetV2V8V1Iainfix &lt;V8V0Aainfix &lt;=c0V8FAainfix &lt;V7V0Aainfix &lt;=c0V4Iainfix =V7ainfix -V6c1Fainfix &gt;agetV2V6V1Aainfix &lt;V6V0Aainfix &lt;=c0V6ainfix &lt;ainfix -V3V9ainfix -V3V4Aainfix &lt;=c0ainfix -V3V4Aainfix &lt;=V10V3Aainfix &lt;=V9V10Iainfix =agetV2V10V1Iainfix &lt;V10V0Aainfix &lt;=c0V10FAainfix &lt;V3V0Aainfix &lt;=c0V9Iainfix =V9ainfix +V6c1Fainfix &lt;agetV2V6V1Aainfix &lt;V6V0Aainfix &lt;=c0V6Aainfix &lt;=V6V3Aainfix &lt;=V4V6Lainfix +V4adivainfix -V3V4c2ainfix &lt;=V4V3Iainfix &lt;=V11V3Aainfix &lt;=V4V11Iainfix =agetV2V11V1Iainfix &lt;V11V0Aainfix &lt;=c0V11FAainfix &lt;V3V0Aainfix &lt;=c0V4FAainfix &lt;=V12ainfix -V0c1Aainfix &lt;=c0V12Iainfix =agetV2V12V1Iainfix &lt;V12V0Aainfix &lt;=c0V12FAainfix &lt;ainfix -V0c1V0Aainfix &lt;=c0c0Iainfix &lt;=agetV2V13agetV2V14Iainfix &lt;V14V0Aainfix &lt;=V13V14Aainfix &lt;=c0V13FAainfix &lt;=c0V0FF"> shape="iNainfix =agetV2V5V1Iainfix &lt;V5V0Aainfix &lt;=c0V5Fiiainfix =agetV2V6V1Aainfix &lt;V6V0Aainfix &lt;=c0V6ainfix &lt;ainfix -V7V4ainfix -V3V4Aainfix &lt;=c0ainfix -V3V4Aainfix &lt;=V8V7Aainfix &lt;=V4V8Iainfix =agetV2V8V1Iainfix &lt;V8V0Aainfix &lt;=c0V8FAainfix &lt;V7V0Aainfix &lt;=c0V4Iainfix =V7ainfix -V6c1Fainfix &gt;agetV2V6V1Aainfix &lt;V6V0Aainfix &lt;=c0V6ainfix &lt;ainfix -V3V9ainfix -V3V4Aainfix &lt;=c0ainfix -V3V4Aainfix &lt;=V10V3Aainfix &lt;=V9V10Iainfix =agetV2V10V1Iainfix &lt;V10V0Aainfix &lt;=c0V10FAainfix &lt;V3V0Aainfix &lt;=c0V9Iainfix =V9ainfix +V6c1Fainfix &lt;agetV2V6V1Aainfix &lt;V6V0Aainfix &lt;=c0V6Aainfix &lt;=V6V3Aainfix &lt;=V4V6Lainfix +V4adivainfix -V3V4c2ainfix &lt;=V4V3Iainfix &lt;=V11V3Aainfix &lt;=V4V11Iainfix =agetV2V11V1Iainfix &lt;V11V0Aainfix &lt;=c0V11FAainfix &lt;V3V0Aainfix &lt;=c0V4FAainfix &lt;=V12ainfix -V0c1Aainfix &lt;=c0V12Iainfix =agetV2V12V1Iainfix &lt;V12V0Aainfix &lt;=c0V12FAainfix &lt;ainfix -V0c1V0Aainfix &lt;=c0c0Iainfix &lt;=agetV2V13agetV2V14Iainfix &lt;V14V0Aainfix &lt;=V13V14Aainfix &lt;=c0V13FAainfix &lt;=c0V0FF">
...@@ -59,7 +59,7 @@ ...@@ -59,7 +59,7 @@
locfile="../binary_search.mlw" locfile="../binary_search.mlw"
loclnum="60" loccnumb="6" loccnume="19" loclnum="60" loccnumb="6" loccnume="19"
expl="VC for binary_search" expl="VC for binary_search"
sum="5954021440d95809176c18fd90076bd1" sum="469d933c0ef6d53b10a8af8040766229"
proved="true" proved="true"
expanded="true" expanded="true"
shape="iNainfix =agetV2V5V1Iainfix &lt;V5V0Aainfix &lt;=c0V5Fiiainfix =agetV2V6V1Aainfix &lt;V6V0Aainfix &lt;=c0V6ainfix &lt;ainfix -V7V4ainfix -V3V4Aainfix &lt;=c0ainfix -V3V4Aainfix &lt;=V8V7Aainfix &lt;=V4V8Iainfix =agetV2V8V1Iainfix &lt;V8V0Aainfix &lt;=c0V8FAainfix &lt;V7V0Aainfix &lt;=c0V4Iainfix =V7ainfix -V6c1Fainfix &gt;agetV2V6V1Aainfix &lt;V6V0Aainfix &lt;=c0V6ainfix &lt;ainfix -V3V9ainfix -V3V4Aainfix &lt;=c0ainfix -V3V4Aainfix &lt;=V10V3Aainfix &lt;=V9V10Iainfix =agetV2V10V1Iainfix &lt;V10V0Aainfix &lt;=c0V10FAainfix &lt;V3V0Aainfix &lt;=c0V9Iainfix =V9ainfix +V6c1Fainfix &lt;agetV2V6V1Aainfix &lt;V6V0Aainfix &lt;=c0V6Iainfix &lt;=V6V3Aainfix &lt;=V4V6FAainfix &lt;=V4V3ainfix &lt;=V4V3Iainfix &lt;=V11V3Aainfix &lt;=V4V11Iainfix =agetV2V11V1Iainfix &lt;V11V0Aainfix &lt;=c0V11FAainfix &lt;V3V0Aainfix &lt;=c0V4FAainfix &lt;=V12ainfix -V0c1Aainfix &lt;=c0V12Iainfix =agetV2V12V1Iainfix &lt;V12V0Aainfix &lt;=c0V12FAainfix &lt;ainfix -V0c1V0Aainfix &lt;=c0c0Iainfix &lt;=agetV2V13agetV2V14Iainfix &lt;V14V0Aainfix &lt;=V13V14Aainfix &lt;=c0V13FAainfix &lt;=c0V0FF"> shape="iNainfix =agetV2V5V1Iainfix &lt;V5V0Aainfix &lt;=c0V5Fiiainfix =agetV2V6V1Aainfix &lt;V6V0Aainfix &lt;=c0V6ainfix &lt;ainfix -V7V4ainfix -V3V4Aainfix &lt;=c0ainfix -V3V4Aainfix &lt;=V8V7Aainfix &lt;=V4V8Iainfix =agetV2V8V1Iainfix &lt;V8V0Aainfix &lt;=c0V8FAainfix &lt;V7V0Aainfix &lt;=c0V4Iainfix =V7ainfix -V6c1Fainfix &gt;agetV2V6V1Aainfix &lt;V6V0Aainfix &lt;=c0V6ainfix &lt;ainfix -V3V9ainfix -V3V4Aainfix &lt;=c0ainfix -V3V4Aainfix &lt;=V10V3Aainfix &lt;=V9V10Iainfix =agetV2V10V1Iainfix &lt;V10V0Aainfix &lt;=c0V10FAainfix &lt;V3V0Aainfix &lt;=c0V9Iainfix =V9ainfix +V6c1Fainfix &lt;agetV2V6V1Aainfix &lt;V6V0Aainfix &lt;=c0V6Iainfix &lt;=V6V3Aainfix &lt;=V4V6FAainfix &lt;=V4V3ainfix &lt;=V4V3Iainfix &lt;=V11V3Aainfix &lt;=V4V11Iainfix =agetV2V11V1Iainfix &lt;V11V0Aainfix &lt;=c0V11FAainfix &lt;V3V0Aainfix &lt;=c0V4FAainfix &lt;=V12ainfix -V0c1Aainfix &lt;=c0V12Iainfix =agetV2V12V1Iainfix &lt;V12V0Aainfix &lt;=c0V12FAainfix &lt;ainfix -V0c1V0Aainfix &lt;=c0c0Iainfix &lt;=agetV2V13agetV2V14Iainfix &lt;V14V0Aainfix &lt;=V13V14Aainfix &lt;=c0V13FAainfix &lt;=c0V0FF">
...@@ -86,7 +86,7 @@ ...@@ -86,7 +86,7 @@
locfile="../binary_search.mlw" locfile="../binary_search.mlw"
loclnum="100" loccnumb="6" loccnume="19" loclnum="100" loccnumb="6" loccnume="19"
expl="VC for binary_search" expl="VC for binary_search"
sum="c1b8b598df35a36bdae0936e15ba8379" sum="b4024703c302726d0965763f55ca4a89"
proved="true" proved="true"
expanded="true" expanded="true"
shape="iNainfix =agetV2V5V1Iainfix &lt;V5V0Aainfix &lt;=c0V5Fiiainfix =agetV2V7V1Aainfix &lt;V7V0Aainfix &lt;=c0V7ainfix &lt;ainfix -V8V4ainfix -V3V4Aainfix &lt;=c0ainfix -V3V4Aainfix &lt;=V9V8Aainfix &lt;=V4V9Iainfix =agetV2V9V1Iainfix &lt;V9V0Aainfix &lt;=c0V9FAainfix &lt;V8V0Aainfix &lt;=c0V4Iainfix =V8ainfix -V7c1FAainfix &lt;=ainfix -V7c1amax_intAainfix &lt;=amin_intainfix -V7c1ainfix &gt;agetV2V7V1Aainfix &lt;V7V0Aainfix &lt;=c0V7ainfix &lt;ainfix -V3V10ainfix -V3V4Aainfix &lt;=c0ainfix -V3V4Aainfix &lt;=V11V3Aainfix &lt;=V10V11Iainfix =agetV2V11V1Iainfix &lt;V11V0Aainfix &lt;=c0V11FAainfix &lt;V3V0Aainfix &lt;=c0V10Iainfix =V10ainfix +V7c1FAainfix &lt;=ainfix +V7c1amax_intAainfix &lt;=amin_intainfix +V7c1ainfix &lt;agetV2V7V1Aainfix &lt;V7V0Aainfix &lt;=c0V7Aainfix &lt;=V7V3Aainfix &lt;=V4V7Lainfix +V4V6Aainfix &lt;=ainfix +V4V6amax_intAainfix &lt;=amin_intainfix +V4V6Ladivainfix -V3V4c2Aainfix &lt;=ainfix -V3V4amax_intAainfix &lt;=amin_intainfix -V3V4ainfix &lt;=V4V3Iainfix &lt;=V12V3Aainfix &lt;=V4V12Iainfix =agetV2V12V1Iainfix &lt;V12V0Aainfix &lt;=c0V12FAainfix &lt;V3V0Aainfix &lt;=c0V4FAainfix &lt;=V13ainfix -V0c1Aainfix &lt;=c0V13Iainfix =agetV2V13V1Iainfix &lt;V13V0Aainfix &lt;=c0V13FAainfix &lt;ainfix -V0c1V0Aainfix &lt;=c0c0Aainfix &lt;=ainfix -V0c1amax_intAainfix &lt;=amin_intainfix -V0c1Iainfix &lt;=agetV2V14agetV2V15Iainfix &lt;V15V0Aainfix &lt;=V14V15Aainfix &lt;=c0V14FAainfix &lt;=V0amax_intAainfix &lt;=c0V0FF"> shape="iNainfix =agetV2V5V1Iainfix &lt;V5V0Aainfix &lt;=c0V5Fiiainfix =agetV2V7V1Aainfix &lt;V7V0Aainfix &lt;=c0V7ainfix &lt;ainfix -V8V4ainfix -V3V4Aainfix &lt;=c0ainfix -V3V4Aainfix &lt;=V9V8Aainfix &lt;=V4V9Iainfix =agetV2V9V1Iainfix &lt;V9V0Aainfix &lt;=c0V9FAainfix &lt;V8V0Aainfix &lt;=c0V4Iainfix =V8ainfix -V7c1FAainfix &lt;=ainfix -V7c1amax_intAainfix &lt;=amin_intainfix -V7c1ainfix &gt;agetV2V7V1Aainfix &lt;V7V0Aainfix &lt;=c0V7ainfix &lt;ainfix -V3V10ainfix -V3V4Aainfix &lt;=c0ainfix -V3V4Aainfix &lt;=V11V3Aainfix &lt;=V10V11Iainfix =agetV2V11V1Iainfix &lt;V11V0Aainfix &lt;=c0V11FAainfix &lt;V3V0Aainfix &lt;=c0V10Iainfix =V10ainfix +V7c1FAainfix &lt;=ainfix +V7c1amax_intAainfix &lt;=amin_intainfix +V7c1ainfix &lt;agetV2V7V1Aainfix &lt;V7V0Aainfix &lt;=c0V7Aainfix &lt;=V7V3Aainfix &lt;=V4V7Lainfix +V4V6Aainfix &lt;=ainfix +V4V6amax_intAainfix &lt;=amin_intainfix +V4V6Ladivainfix -V3V4c2Aainfix &lt;=ainfix -V3V4amax_intAainfix &lt;=amin_intainfix -V3V4ainfix &lt;=V4V3Iainfix &lt;=V12V3Aainfix &lt;=V4V12Iainfix =agetV2V12V1Iainfix &lt;V12V0Aainfix &lt;=c0V12FAainfix &lt;V3V0Aainfix &lt;=c0V4FAainfix &lt;=V13ainfix -V0c1Aainfix &lt;=c0V13Iainfix =agetV2V13V1Iainfix &lt;V13V0Aainfix &lt;=c0V13FAainfix &lt;ainfix -V0c1V0Aainfix &lt;=c0c0Aainfix &lt;=ainfix -V0c1amax_intAainfix &lt;=amin_intainfix -V0c1Iainfix &lt;=agetV2V14agetV2V15Iainfix &lt;V15V0Aainfix &lt;=V14V15Aainfix &lt;=c0V14FAainfix &lt;=V0amax_intAainfix &lt;=c0V0FF">
......
...@@ -16,7 +16,7 @@ ...@@ -16,7 +16,7 @@
<prover <prover
id="3" id="3"
name="CVC4" name="CVC4"
version="1.0"/> version="1.2"/>
<prover <prover
id="4" id="4"
name="Coq" name="Coq"
...@@ -200,7 +200,7 @@ ...@@ -200,7 +200,7 @@
edited="bitvector_BitVector_to_nat_of_zero_1.v" edited="bitvector_BitVector_to_nat_of_zero_1.v"
obsolete="false" obsolete="false"
archived="false"> archived="false">
<result status="valid" time="1.65"/> <result status="valid" time="1.23"/>
</proof> </proof>
</goal> </goal>
<goal <goal
...@@ -218,7 +218,7 @@ ...@@ -218,7 +218,7 @@
edited="bitvector_BitVector_to_nat_of_one_1.v" edited="bitvector_BitVector_to_nat_of_one_1.v"
obsolete="false" obsolete="false"
archived="false"> archived="false">
<result status="valid" time="2.32"/> <result status="valid" time="1.31"/>
</proof> </proof>
</goal> </goal>
<goal <goal
...@@ -236,7 +236,7 @@ ...@@ -236,7 +236,7 @@
edited="bitvector_BitVector_to_nat_sub_footprint_1.v" edited="bitvector_BitVector_to_nat_sub_footprint_1.v"
obsolete="false" obsolete="false"
archived="false"> archived="false">
<result status="valid" time="8.33"/> <result status="valid" time="9.33"/>
</proof> </proof>
</goal> </goal>
<goal <goal
...@@ -529,7 +529,7 @@ ...@@ -529,7 +529,7 @@
memlimit="1000" memlimit="1000"
obsolete="false" obsolete="false"
archived="false"> archived="false">
<result status="timeout" time="5.04"/> <result status="valid" time="0.04"/>
</proof> </proof>
<proof <proof
prover="5" prover="5"
...@@ -1756,7 +1756,7 @@ ...@@ -1756,7 +1756,7 @@
locfile="../bitvector.why" locfile="../bitvector.why"
loclnum="455" loccnumb="7" loccnume="24" loclnum="455" loccnumb="7" loccnume="24"
sum="d3a213e5d10a94f1672c2f81616ef199" sum="d3a213e5d10a94f1672c2f81616ef199"
proved="false" proved="true"
expanded="true" expanded="true"
shape="ainfix =ato_natalsrabvonec18c16383"> shape="ainfix =ato_natalsrabvonec18c16383">
<proof <proof
...@@ -1789,7 +1789,7 @@ ...@@ -1789,7 +1789,7 @@
memlimit="1000" memlimit="1000"
obsolete="false" obsolete="false"
archived="false"> archived="false">
<result status="timeout" time="5.08"/> <result status="valid" time="4.26"/>
</proof> </proof>
<proof <proof
prover="5" prover="5"
...@@ -1821,7 +1821,7 @@ ...@@ -1821,7 +1821,7 @@
locfile="../bitvector.why" locfile="../bitvector.why"
loclnum="458" loccnumb="7" loccnume="24" loclnum="458" loccnumb="7" loccnume="24"
sum="89780e352ce90762edd80b151dd0fa63" sum="89780e352ce90762edd80b151dd0fa63"
proved="false" proved="true"
expanded="true" expanded="true"
shape="ainfix =ato_natalsrabvonec17c32767"> shape="ainfix =ato_natalsrabvonec17c32767">
<proof <proof
...@@ -1854,7 +1854,7 @@ ...@@ -1854,7 +1854,7 @@
memlimit="1000" memlimit="1000"
obsolete="false" obsolete="false"
archived="false"> archived="false">
<result status="timeout" time="5.06"/> <result status="valid" time="3.72"/>
</proof> </proof>
<proof <proof
prover="5" prover="5"
...@@ -1886,7 +1886,7 @@ ...@@ -1886,7 +1886,7 @@
locfile="../bitvector.why" locfile="../bitvector.why"
loclnum="461" loccnumb="7" loccnume="24" loclnum="461" loccnumb="7" loccnume="24"
sum="7cf453c2e02082e54109f72a5e101fef" sum="7cf453c2e02082e54109f72a5e101fef"
proved="false" proved="true"
expanded="true" expanded="true"
shape="ainfix =ato_natalsrabvonec16c65535"> shape="ainfix =ato_natalsrabvonec16c65535">
<proof <proof
...@@ -1919,7 +1919,7 @@ ...@@ -1919,7 +1919,7 @@
memlimit="1000" memlimit="1000"
obsolete="false" obsolete="false"
archived="false"> archived="false">
<result status="timeout" time="5.06"/> <result status="valid" time="3.12"/>
</proof> </proof>
<proof <proof
prover="5" prover="5"
...@@ -1951,7 +1951,7 @@ ...@@ -1951,7 +1951,7 @@
locfile="../bitvector.why" locfile="../bitvector.why"
loclnum="469" loccnumb="7" loccnume="24" loclnum="469" loccnumb="7" loccnume="24"
sum="81a4492651176e01d54e30bb34905b03" sum="81a4492651176e01d54e30bb34905b03"
proved="false" proved="true"
expanded="true" expanded="true"
shape="ainfix =ato_natalsrabvonec15c131071"> shape="ainfix =ato_natalsrabvonec15c131071">
<proof <proof
...@@ -1984,7 +1984,7 @@ ...@@ -1984,7 +1984,7 @@
memlimit="1000" memlimit="1000"
obsolete="false" obsolete="false"
archived="false"> archived="false">
<result status="timeout" time="5.03"/> <result status="valid" time="2.48"/>
</proof> </proof>
<proof <proof
prover="5" prover="5"
...@@ -2016,7 +2016,7 @@ ...@@ -2016,7 +2016,7 @@
locfile="../bitvector.why" locfile="../bitvector.why"
loclnum="472" loccnumb="7" loccnume="24" loclnum="472" loccnumb="7" loccnume="24"
sum="24edb5c87fb553582f0a0fa7d1d0ba98" sum="24edb5c87fb553582f0a0fa7d1d0ba98"
proved="false" proved="true"
expanded="true" expanded="true"
shape="ainfix =ato_natalsrabvonec14c262143"> shape="ainfix =ato_natalsrabvonec14c262143">
<proof <proof
...@@ -2049,7 +2049,7 @@ ...@@ -2049,7 +2049,7 @@
memlimit="1000" memlimit="1000"
obsolete="false" obsolete="false"
archived="false"> archived="false">
<result status="timeout" time="5.03"/> <result status="valid" time="1.85"/>
</proof> </proof>
<proof <proof
prover="5" prover="5"
...@@ -2081,7 +2081,7 @@ ...@@ -2081,7 +2081,7 @@
locfile="../bitvector.why" locfile="../bitvector.why"
loclnum="475" loccnumb="7" loccnume="24" loclnum="475" loccnumb="7" loccnume="24"
sum="843cbb41fe2fcc3af6648d1f99201031" sum="843cbb41fe2fcc3af6648d1f99201031"
proved="false" proved="true"
expanded="true" expanded="true"
shape="ainfix =ato_natalsrabvonec13c524287"> shape="ainfix =ato_natalsrabvonec13c524287">
<proof <proof
...@@ -2114,7 +2114,7 @@ ...@@ -2114,7 +2114,7 @@
memlimit="1000" memlimit="1000"
obsolete="false" obsolete="false"
archived="false"> archived="false">
<result status="timeout" time="5.03"/> <result status="valid" time="1.50"/>
</proof> </proof>
<proof <proof
prover="5" prover="5"
...@@ -2146,7 +2146,7 @@ ...@@ -2146,7 +2146,7 @@
locfile="../bitvector.why" locfile="../bitvector.why"
loclnum="478" loccnumb="7" loccnume="24" loclnum="478" loccnumb="7" loccnume="24"
sum="5622cc9887e70441643b97c0c3c29c3d" sum="5622cc9887e70441643b97c0c3c29c3d"
proved="false" proved="true"
expanded="true" expanded="true"
shape="ainfix =ato_natalsrabvonec12c1048575"> shape="ainfix =ato_natalsrabvonec12c1048575">
<proof <proof
...@@ -2179,7 +2179,7 @@ ...@@ -2179,7 +2179,7 @@
memlimit="1000" memlimit="1000"
obsolete="false" obsolete="false"
archived="false"> archived="false">
<result status="timeout" time="5.13"/> <result status="valid" time="1.09"/>
</proof> </proof>
<proof <proof
prover="5" prover="5"
...@@ -2211,7 +2211,7 @@ ...@@ -2211,7 +2211,7 @@
locfile="../bitvector.why" locfile="../bitvector.why"
loclnum="481" loccnumb="7" loccnume="24" loclnum="481" loccnumb="7" loccnume="24"
sum="f5844696ec84cfe5ad19392c41e4c6dd" sum="f5844696ec84cfe5ad19392c41e4c6dd"
proved="false" proved="true"
expanded="true" expanded="true"
shape="ainfix =ato_natalsrabvonec8c16777215"> shape="ainfix =ato_natalsrabvonec8c16777215">
<proof <proof
...@@ -2244,7 +2244,7 @@ ...@@ -2244,7 +2244,7 @@
memlimit="1000" memlimit="1000"
obsolete="false" obsolete="false"
archived="false"> archived="false">
<result status="timeout" time="5.03"/> <result status="valid" time="0.36"/>
</proof> </proof>
<proof <proof
prover="5" prover="5"
......
...@@ -8,7 +8,7 @@ ...@@ -8,7 +8,7 @@
<prover <prover
id="1" id="1"
name="CVC4" name="CVC4"
version="1.0"/> version="1.2"/>
<prover <prover
id="2" id="2"
name="Coq" name="Coq"
......
This diff is collapsed.
...@@ -4,7 +4,7 @@ ...@@ -4,7 +4,7 @@
<prover <prover
id="0" id="0"
name="Alt-Ergo" name="Alt-Ergo"
version="0.94"/> version="0.95.1"/>
<file <file
name="../13375.mlw" name="../13375.mlw"