Commit 9bf1998f authored by Andrei Paskevich's avatar Andrei Paskevich
Browse files

update sessions (in progress)

parent ac976a84
......@@ -11,8 +11,12 @@
version="2.4.1"/>
<prover
id="2"
name="Spass"
version="3.7"/>
name="Eprover"
version="1.6"/>
<prover
id="3"
name="Vampire"
version="0.6"/>
<file
name="../algo63.mlw"
verified="true"
......@@ -28,9 +32,9 @@
locfile="../algo63.mlw"
loclnum="23" loccnumb="6" loccnume="14"
expl="VC for exchange"
sum="863d335d0c938d951df3f228ee666db7"
sum="3e44f4783367234e4abc31b0d08c3493"
proved="true"
expanded="true"
expanded="false"
shape="apermut_subV5V7V1ainfix +V2c1AaexchangeV5V7V3V4Iainfix =V7asetV6V4agetV5V3Aainfix &lt;=c0V0FAainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix =V6asetV5V3agetV5V4Aainfix &lt;=c0V0FAainfix &lt;V3V0Aainfix &lt;=c0V3Aainfix &lt;V4V0Aainfix &lt;=c0V4Aainfix &lt;V3V0Aainfix &lt;=c0V3Iainfix &lt;=V4V2Aainfix &lt;=V1V4Aainfix &lt;V2V0Aainfix &lt;=V3V2Aainfix &lt;=V1V3Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
<label
name="expl:VC for exchange"/>
......@@ -48,7 +52,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="VC for partition_"
sum="bd2b572a9bc5cf0308acd8be49766159"
sum="96b56b02850cec317d1336ee1cbfa06d"
proved="true"
expanded="false"
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......@@ -63,7 +67,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="1. precondition"
sum="3797e16c7802bc7def87e4f3ce917860"
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expanded="false"
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......@@ -83,7 +87,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="2. loop invariant init"
sum="42a07eaa024df266cae48615e49484d3"
sum="a350a2bf5cf56e32deccf5b9c89b9233"
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......@@ -103,7 +107,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="3. loop invariant init"
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sum="ae11939f427f925a69743f59300ad72a"
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......@@ -123,7 +127,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="4. precondition"
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......@@ -143,7 +147,7 @@
locfile="../algo63.mlw"
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proved="true"
expanded="false"
shape="loop invariant preservationainfix &lt;=V13V2Aainfix &lt;=V1V13Iainfix =V13ainfix +V12c1FIainfix &lt;=agetV11V12V5Iainfix &lt;V12V0Aainfix &lt;=c0V12Iainfix &lt;V12V2Iainfix &lt;=agetV11V14V5Iainfix &lt;V14V12Aainfix &lt;=V1V14FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V15V5Iainfix &lt;=V15V2Aainfix &lt;V9V15FAainfix &lt;=agetV11V16V5Iainfix &lt;V16V10Aainfix &lt;=V1V16FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -163,7 +167,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="6. loop invariant preservation"
sum="fff45d1a1f29fb2bbe023ee37455940b"
sum="ab97e82694521a31cecec047597373cb"
proved="true"
expanded="false"
shape="loop invariant preservationainfix &lt;=agetV11V14V5Iainfix &lt;V14V13Aainfix &lt;=V1V14FIainfix =V13ainfix +V12c1FIainfix &lt;=agetV11V12V5Iainfix &lt;V12V0Aainfix &lt;=c0V12Iainfix &lt;V12V2Iainfix &lt;=agetV11V15V5Iainfix &lt;V15V12Aainfix &lt;=V1V15FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V16V5Iainfix &lt;=V16V2Aainfix &lt;V9V16FAainfix &lt;=agetV11V17V5Iainfix &lt;V17V10Aainfix &lt;=V1V17FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -183,7 +187,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="7. loop variant decrease"
sum="555ac37fafd3a769d1770c4142cbf038"
sum="c63a729ff9066a11e3279138b85cbe96"
proved="true"
expanded="false"
shape="loop variant decreaseainfix &lt;ainfix -V2V13ainfix -V2V12Aainfix &lt;=c0ainfix -V2V12Iainfix =V13ainfix +V12c1FIainfix &lt;=agetV11V12V5Iainfix &lt;V12V0Aainfix &lt;=c0V12Iainfix &lt;V12V2Iainfix &lt;=agetV11V14V5Iainfix &lt;V14V12Aainfix &lt;=V1V14FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V15V5Iainfix &lt;=V15V2Aainfix &lt;V9V15FAainfix &lt;=agetV11V16V5Iainfix &lt;V16V10Aainfix &lt;=V1V16FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -203,7 +207,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="8. loop invariant init"
sum="6a205fc128b593723610123e77714f03"
sum="8b957f45e8ca7e6c62c4dbc48e4e0a6a"
proved="true"
expanded="false"
shape="loop invariant initainfix &lt;=V9V2Aainfix &lt;=V1V9INainfix &lt;=agetV11V12V5Iainfix &lt;V12V0Aainfix &lt;=c0V12Iainfix &lt;V12V2Iainfix &lt;=agetV11V13V5Iainfix &lt;V13V12Aainfix &lt;=V1V13FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V14V5Iainfix &lt;=V14V2Aainfix &lt;V9V14FAainfix &lt;=agetV11V15V5Iainfix &lt;V15V10Aainfix &lt;=V1V15FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -223,7 +227,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="9. loop invariant init"
sum="aa67b40fb87098572f2ae5fad1602831"
sum="f17cba729df6c11d3f0935519c59ddc3"
proved="true"
expanded="false"
shape="loop invariant initainfix &gt;=agetV11V13V5Iainfix &lt;=V13V2Aainfix &lt;V9V13FINainfix &lt;=agetV11V12V5Iainfix &lt;V12V0Aainfix &lt;=c0V12Iainfix &lt;V12V2Iainfix &lt;=agetV11V14V5Iainfix &lt;V14V12Aainfix &lt;=V1V14FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V15V5Iainfix &lt;=V15V2Aainfix &lt;V9V15FAainfix &lt;=agetV11V16V5Iainfix &lt;V16V10Aainfix &lt;=V1V16FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -243,7 +247,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="10. precondition"
sum="754d1b3f070b9ac3104c3f0697fa25fc"
sum="ffba21c2b05913cd8445ac42a3afe150"
proved="true"
expanded="false"
shape="preconditionainfix &lt;V13V0Aainfix &lt;=c0V13Iainfix &lt;V1V13Iainfix &gt;=agetV11V14V5Iainfix &lt;=V14V2Aainfix &lt;V13V14FAainfix &lt;=V13V2Aainfix &lt;=V1V13FINainfix &lt;=agetV11V12V5Iainfix &lt;V12V0Aainfix &lt;=c0V12Iainfix &lt;V12V2Iainfix &lt;=agetV11V15V5Iainfix &lt;V15V12Aainfix &lt;=V1V15FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V16V5Iainfix &lt;=V16V2Aainfix &lt;V9V16FAainfix &lt;=agetV11V17V5Iainfix &lt;V17V10Aainfix &lt;=V1V17FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -263,7 +267,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="11. loop invariant preservation"
sum="1758ebd0522bca6ef1313a5130e7d03a"
sum="39087b56eb74e0526bb6daf2a6e26a34"
proved="true"
expanded="false"
shape="loop invariant preservationainfix &lt;=V14V2Aainfix &lt;=V1V14Iainfix =V14ainfix -V13c1FIainfix &gt;=agetV11V13V5Iainfix &lt;V13V0Aainfix &lt;=c0V13Iainfix &lt;V1V13Iainfix &gt;=agetV11V15V5Iainfix &lt;=V15V2Aainfix &lt;V13V15FAainfix &lt;=V13V2Aainfix &lt;=V1V13FINainfix &lt;=agetV11V12V5Iainfix &lt;V12V0Aainfix &lt;=c0V12Iainfix &lt;V12V2Iainfix &lt;=agetV11V16V5Iainfix &lt;V16V12Aainfix &lt;=V1V16FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V17V5Iainfix &lt;=V17V2Aainfix &lt;V9V17FAainfix &lt;=agetV11V18V5Iainfix &lt;V18V10Aainfix &lt;=V1V18FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -283,7 +287,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="12. loop invariant preservation"
sum="b3d9990aca52a8c787421695dbdd0ad8"
sum="13c90cdd60d5392b9c7b47f1ac1cea7d"
proved="true"
expanded="false"
shape="loop invariant preservationainfix &gt;=agetV11V15V5Iainfix &lt;=V15V2Aainfix &lt;V14V15FIainfix =V14ainfix -V13c1FIainfix &gt;=agetV11V13V5Iainfix &lt;V13V0Aainfix &lt;=c0V13Iainfix &lt;V1V13Iainfix &gt;=agetV11V16V5Iainfix &lt;=V16V2Aainfix &lt;V13V16FAainfix &lt;=V13V2Aainfix &lt;=V1V13FINainfix &lt;=agetV11V12V5Iainfix &lt;V12V0Aainfix &lt;=c0V12Iainfix &lt;V12V2Iainfix &lt;=agetV11V17V5Iainfix &lt;V17V12Aainfix &lt;=V1V17FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V18V5Iainfix &lt;=V18V2Aainfix &lt;V9V18FAainfix &lt;=agetV11V19V5Iainfix &lt;V19V10Aainfix &lt;=V1V19FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -303,7 +307,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="13. loop variant decrease"
sum="06ea7bc58c3020ffd485c2d40add590a"
sum="0f5f7e7628ac38902a0a61cdb9d55159"
proved="true"
expanded="false"
shape="loop variant decreaseainfix &lt;V14V13Aainfix &lt;=c0V13Iainfix =V14ainfix -V13c1FIainfix &gt;=agetV11V13V5Iainfix &lt;V13V0Aainfix &lt;=c0V13Iainfix &lt;V1V13Iainfix &gt;=agetV11V15V5Iainfix &lt;=V15V2Aainfix &lt;V13V15FAainfix &lt;=V13V2Aainfix &lt;=V1V13FINainfix &lt;=agetV11V12V5Iainfix &lt;V12V0Aainfix &lt;=c0V12Iainfix &lt;V12V2Iainfix &lt;=agetV11V16V5Iainfix &lt;V16V12Aainfix &lt;=V1V16FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V17V5Iainfix &lt;=V17V2Aainfix &lt;V9V17FAainfix &lt;=agetV11V18V5Iainfix &lt;V18V10Aainfix &lt;=V1V18FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -323,7 +327,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="14. precondition"
sum="99cc4f993b42485fb9cfef763ca8dfb8"
sum="4e6168c31d40851b6eda1dba4e587f3f"
proved="true"
expanded="false"
shape="preconditionainfix &lt;=V13V2Aainfix &lt;=V1V13Aainfix &lt;V2V0Aainfix &lt;=V12V2Aainfix &lt;=V1V12Aainfix &lt;=c0V1Iainfix &lt;V12V13INainfix &gt;=agetV11V13V5Iainfix &lt;V13V0Aainfix &lt;=c0V13Iainfix &lt;V1V13Iainfix &gt;=agetV11V14V5Iainfix &lt;=V14V2Aainfix &lt;V13V14FAainfix &lt;=V13V2Aainfix &lt;=V1V13FINainfix &lt;=agetV11V12V5Iainfix &lt;V12V0Aainfix &lt;=c0V12Iainfix &lt;V12V2Iainfix &lt;=agetV11V15V5Iainfix &lt;V15V12Aainfix &lt;=V1V15FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V16V5Iainfix &lt;=V16V2Aainfix &lt;V9V16FAainfix &lt;=agetV11V17V5Iainfix &lt;V17V10Aainfix &lt;=V1V17FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -351,7 +355,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="15. variant decrease"
sum="2e87a1500cca72bf050e0d3ce76d84fb"
sum="74073f0f7a661b71c2c3bd911a3d1a4e"
proved="true"
expanded="false"
shape="variant decreaseainfix &lt;ainfix -ainfix +c1V16V15ainfix -ainfix +c1V9V10Aainfix &lt;=c0ainfix -ainfix +c1V9V10Iainfix =V16ainfix -V13c1FIainfix =V15ainfix +V12c1FIapermut_subV11V14V1ainfix +V2c1AaexchangeV11V14V12V13Aainfix &lt;=c0V0FIainfix &lt;=V13V2Aainfix &lt;=V1V13Aainfix &lt;V2V0Aainfix &lt;=V12V2Aainfix &lt;=V1V12Aainfix &lt;=c0V1Iainfix &lt;V12V13INainfix &gt;=agetV11V13V5Iainfix &lt;V13V0Aainfix &lt;=c0V13Iainfix &lt;V1V13Iainfix &gt;=agetV11V17V5Iainfix &lt;=V17V2Aainfix &lt;V13V17FAainfix &lt;=V13V2Aainfix &lt;=V1V13FINainfix &lt;=agetV11V12V5Iainfix &lt;V12V0Aainfix &lt;=c0V12Iainfix &lt;V12V2Iainfix &lt;=agetV11V18V5Iainfix &lt;V18V12Aainfix &lt;=V1V18FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V19V5Iainfix &lt;=V19V2Aainfix &lt;V9V19FAainfix &lt;=agetV11V20V5Iainfix &lt;V20V10Aainfix &lt;=V1V20FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -371,7 +375,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="16. precondition"
sum="891fdf468e7b86ab32a0f197567ba896"
sum="6ffec341bf22e4d7e59beea7769b10f2"
proved="true"
expanded="false"
shape="preconditionainfix &lt;=V15V2Aainfix &lt;=V1V15Aainfix &lt;=V16V2Aainfix &lt;=V1V16Iainfix =V16ainfix -V13c1FIainfix =V15ainfix +V12c1FIapermut_subV11V14V1ainfix +V2c1AaexchangeV11V14V12V13Aainfix &lt;=c0V0FIainfix &lt;=V13V2Aainfix &lt;=V1V13Aainfix &lt;V2V0Aainfix &lt;=V12V2Aainfix &lt;=V1V12Aainfix &lt;=c0V1Iainfix &lt;V12V13INainfix &gt;=agetV11V13V5Iainfix &lt;V13V0Aainfix &lt;=c0V13Iainfix &lt;V1V13Iainfix &gt;=agetV11V17V5Iainfix &lt;=V17V2Aainfix &lt;V13V17FAainfix &lt;=V13V2Aainfix &lt;=V1V13FINainfix &lt;=agetV11V12V5Iainfix &lt;V12V0Aainfix &lt;=c0V12Iainfix &lt;V12V2Iainfix &lt;=agetV11V18V5Iainfix &lt;V18V12Aainfix &lt;=V1V18FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V19V5Iainfix &lt;=V19V2Aainfix &lt;V9V19FAainfix &lt;=agetV11V20V5Iainfix &lt;V20V10Aainfix &lt;=V1V20FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -391,7 +395,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="17. precondition"
sum="859d0c44df9a944e23954e48a5be4e52"
sum="808812baf2fd6747b3c8aab52fb16fa8"
proved="true"
expanded="false"
shape="preconditionapermut_subV3V14V1ainfix +V2c1Iainfix =V16ainfix -V13c1FIainfix =V15ainfix +V12c1FIapermut_subV11V14V1ainfix +V2c1AaexchangeV11V14V12V13Aainfix &lt;=c0V0FIainfix &lt;=V13V2Aainfix &lt;=V1V13Aainfix &lt;V2V0Aainfix &lt;=V12V2Aainfix &lt;=V1V12Aainfix &lt;=c0V1Iainfix &lt;V12V13INainfix &gt;=agetV11V13V5Iainfix &lt;V13V0Aainfix &lt;=c0V13Iainfix &lt;V1V13Iainfix &gt;=agetV11V17V5Iainfix &lt;=V17V2Aainfix &lt;V13V17FAainfix &lt;=V13V2Aainfix &lt;=V1V13FINainfix &lt;=agetV11V12V5Iainfix &lt;V12V0Aainfix &lt;=c0V12Iainfix &lt;V12V2Iainfix &lt;=agetV11V18V5Iainfix &lt;V18V12Aainfix &lt;=V1V18FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V19V5Iainfix &lt;=V19V2Aainfix &lt;V9V19FAainfix &lt;=agetV11V20V5Iainfix &lt;V20V10Aainfix &lt;=V1V20FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -411,7 +415,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="18. precondition"
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sum="21374069da6d502fc1a64ca337344796"
proved="true"
expanded="false"
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......@@ -431,7 +435,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="19. precondition"
sum="dcde2b3d6ea000bd0c5a13a28cb583d0"
sum="409e7649f698578d28e9ff6dfcb5636d"
proved="true"
expanded="false"
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......@@ -451,7 +455,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="20. precondition"
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sum="b86671fde793ded88ab30a07551a0262"
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expanded="false"
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......@@ -471,7 +475,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="21. postcondition"
sum="18e6d486689894e3715ecab752fcee9c"
sum="893bd03274d3739f0c38d58a916b52c6"
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expanded="false"
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......@@ -491,7 +495,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="22. postcondition"
sum="ac63c0672931afe29b40a26d1d58d37e"
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......@@ -511,7 +515,7 @@
locfile="../algo63.mlw"
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expl="23. postcondition"
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......@@ -531,7 +535,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="24. postcondition"
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......@@ -551,7 +555,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="25. postcondition"
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......@@ -571,7 +575,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="26. postcondition"
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sum="ec0dc3f1e9c8f21b7826ef5630e4435b"
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......@@ -591,7 +595,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="27. postcondition"
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......@@ -611,7 +615,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="28. postcondition"
sum="64475f06a0b57c3134ec3abb3ffefdee"
sum="25ab147a24c2b021c11f1ac055b5fa17"
proved="true"
expanded="false"
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......@@ -631,7 +635,7 @@
locfile="../algo63.mlw"
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expl="29. postcondition"
sum="dd18151307d38a73512b80922942c377"
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proved="true"
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......@@ -651,7 +655,7 @@
locfile="../algo63.mlw"
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expl="30. postcondition"
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......@@ -671,7 +675,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="31. postcondition"
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......@@ -691,7 +695,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="32. postcondition"
sum="8a424eb151dcddb05453d883b53158fb"
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......@@ -711,7 +715,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="33. postcondition"
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sum="99c29f6bfd02f130fcaa8ba3b90524e9"
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......@@ -731,7 +735,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="34. postcondition"
sum="844a10f30d7d3e94bbc7f2d7bfcbd5b7"
sum="af11365188b8dd8bb7e868213e9300da"
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......@@ -751,7 +755,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
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......@@ -771,7 +775,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="36. variant decrease"
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sum="a8566513ea1d2dbd383e3557dbe4150c"
proved="true"
expanded="false"
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......@@ -791,7 +795,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="37. precondition"
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......@@ -811,7 +815,7 @@
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......@@ -831,7 +835,7 @@
locfile="../algo63.mlw"
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......@@ -851,7 +855,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="40. precondition"
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......@@ -871,7 +875,7 @@
locfile="../algo63.mlw"
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......@@ -891,7 +895,7 @@
locfile="../algo63.mlw"
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......@@ -911,7 +915,7 @@
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......@@ -931,7 +935,7 @@
locfile="../algo63.mlw"
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......@@ -951,7 +955,7 @@
locfile="../algo63.mlw"
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......@@ -971,7 +975,7 @@
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......@@ -991,7 +995,7 @@
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......@@ -1011,7 +1015,7 @@
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......@@ -1031,7 +1035,7 @@
locfile="../algo63.mlw"
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......@@ -1051,7 +1055,7 @@
locfile="../algo63.mlw"
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......@@ -1071,7 +1075,7 @@
locfile="../algo63.mlw"
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......@@ -1091,7 +1095,7 @@
locfile="../algo63.mlw"
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......@@ -1111,7 +1115,7 @@
locfile="../algo63.mlw"
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......@@ -1131,7 +1135,7 @@
locfile="../algo63.mlw"
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......@@ -1151,7 +1155,7 @@
locfile="../algo63.mlw"
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......@@ -1171,7 +1175,7 @@
locfile="../algo63.mlw"
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......@@ -1191,7 +1195,7 @@
locfile="../algo63.mlw"
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proved="true"
expanded="false"
shape="loop invariant initainfix &gt;=agetV11V13V5Iainfix &lt;=V13V2Aainfix &lt;V9V13FINainfix &lt;V12V2Iainfix &lt;=agetV11V14V5Iainfix &lt;V14V12Aainfix &lt;=V1V14FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V15V5Iainfix &lt;=V15V2Aainfix &lt;V9V15FAainfix &lt;=agetV11V16V5Iainfix &lt;V16V10Aainfix &lt;=V1V16FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -1211,7 +1215,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="58. precondition"
sum="1de2dd99509d615252d42ab2a99e1ac8"
sum="efdb99d121f6b4a86ccd265f68a619d5"
proved="true"
expanded="false"
shape="preconditionainfix &lt;V13V0Aainfix &lt;=c0V13Iainfix &lt;V1V13Iainfix &gt;=agetV11V14V5Iainfix &lt;=V14V2Aainfix &lt;V13V14FAainfix &lt;=V13V2Aainfix &lt;=V1V13FINainfix &lt;V12V2Iainfix &lt;=agetV11V15V5Iainfix &lt;V15V12Aainfix &lt;=V1V15FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V16V5Iainfix &lt;=V16V2Aainfix &lt;V9V16FAainfix &lt;=agetV11V17V5Iainfix &lt;V17V10Aainfix &lt;=V1V17FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -1231,7 +1235,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="59. loop invariant preservation"
sum="38d5871fc833e1e9440d15d3cf42b1ef"
sum="319ca1c412ae1bdb1c022d8c4a5bec4a"
proved="true"
expanded="false"
shape="loop invariant preservationainfix &lt;=V14V2Aainfix &lt;=V1V14Iainfix =V14ainfix -V13c1FIainfix &gt;=agetV11V13V5Iainfix &lt;V13V0Aainfix &lt;=c0V13Iainfix &lt;V1V13Iainfix &gt;=agetV11V15V5Iainfix &lt;=V15V2Aainfix &lt;V13V15FAainfix &lt;=V13V2Aainfix &lt;=V1V13FINainfix &lt;V12V2Iainfix &lt;=agetV11V16V5Iainfix &lt;V16V12Aainfix &lt;=V1V16FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V17V5Iainfix &lt;=V17V2Aainfix &lt;V9V17FAainfix &lt;=agetV11V18V5Iainfix &lt;V18V10Aainfix &lt;=V1V18FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -1251,7 +1255,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="60. loop invariant preservation"
sum="718b0e230ccef01081dd5d6d2b2473f4"
sum="bac9aaa2a06ab0cd77dc7a850eec5f42"
proved="true"
expanded="false"
shape="loop invariant preservationainfix &gt;=agetV11V15V5Iainfix &lt;=V15V2Aainfix &lt;V14V15FIainfix =V14ainfix -V13c1FIainfix &gt;=agetV11V13V5Iainfix &lt;V13V0Aainfix &lt;=c0V13Iainfix &lt;V1V13Iainfix &gt;=agetV11V16V5Iainfix &lt;=V16V2Aainfix &lt;V13V16FAainfix &lt;=V13V2Aainfix &lt;=V1V13FINainfix &lt;V12V2Iainfix &lt;=agetV11V17V5Iainfix &lt;V17V12Aainfix &lt;=V1V17FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V18V5Iainfix &lt;=V18V2Aainfix &lt;V9V18FAainfix &lt;=agetV11V19V5Iainfix &lt;V19V10Aainfix &lt;=V1V19FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -1271,7 +1275,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="61. loop variant decrease"
sum="f0b8b6f6c3655daf1a35ef777b00d1ec"
sum="95cc0064e42eafbd005d543c462ebedb"
proved="true"
expanded="false"
shape="loop variant decreaseainfix &lt;V14V13Aainfix &lt;=c0V13Iainfix =V14ainfix -V13c1FIainfix &gt;=agetV11V13V5Iainfix &lt;V13V0Aainfix &lt;=c0V13Iainfix &lt;V1V13Iainfix &gt;=agetV11V15V5Iainfix &lt;=V15V2Aainfix &lt;V13V15FAainfix &lt;=V13V2Aainfix &lt;=V1V13FINainfix &lt;V12V2Iainfix &lt;=agetV11V16V5Iainfix &lt;V16V12Aainfix &lt;=V1V16FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V17V5Iainfix &lt;=V17V2Aainfix &lt;V9V17FAainfix &lt;=agetV11V18V5Iainfix &lt;V18V10Aainfix &lt;=V1V18FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -1291,7 +1295,7 @@
locfile="../algo63.mlw"
loclnum="33" loccnumb="6" loccnume="16"
expl="62. precondition"
sum="63c26ef54acc7ee353bafd7842068b63"
sum="f7d5112a7a5e9ad8a1a6bf78e69468e2"
proved="true"
expanded="false"
shape="preconditionainfix &lt;=V13V2Aainfix &lt;=V1V13Aainfix &lt;V2V0Aainfix &lt;=V12V2Aainfix &lt;=V1V12Aainfix &lt;=c0V1Iainfix &lt;V12V13INainfix &gt;=agetV11V13V5Iainfix &lt;V13V0Aainfix &lt;=c0V13Iainfix &lt;V1V13Iainfix &gt;=agetV11V14V5Iainfix &lt;=V14V2Aainfix &lt;V13V14FAainfix &lt;=V13V2Aainfix &lt;=V1V13FINainfix &lt;V12V2Iainfix &lt;=agetV11V15V5Iainfix &lt;V15V12Aainfix &lt;=V1V15FAainfix &lt;=V12V2Aainfix &lt;=V1V12FIainfix =agetV11V4V5Aainfix &gt;=agetV11V16V5Iainfix &lt;=V16V2Aainfix &lt;V9V16FAainfix &lt;=agetV11V17V5Iainfix &lt;V17V10Aainfix &lt;=V1V17FAapermut_subV3V11V1ainfix +V2c1Aainfix &lt;=V10V2Aainfix &lt;=V1V10Aainfix &lt;=V9V2Aainfix &lt;=V1V9Aainfix &lt;=c0V0FIainfix =V8V2FIainfix =V7V1FIainfix =V6V5FLagetV3V4Iainfix &lt;V4V0Aainfix &lt;=c0V4Iainfix &lt;=V4V2Aainfix &lt;=V1V4FIainfix &lt;V2V0Aainfix &lt;V1V2Aainfix &lt;=c0V1Aainfix &lt;=c0V0FF">
......@@ -1311,7 +1315,7 @@
locfile="../algo63.mlw"