Commit 4dd0cc57 authored by Sylvain Dailler's avatar Sylvain Dailler

Adapt Isabelle realizations to new_system/master

This only adapts existing .thy files so that compilation go through.
Modifications may/(should?) be improved as they were mainly application of
sledgehammer.
Compilation should work for both Isabelle2016-1 and Isabelle2017.
parent ba2f367a
......@@ -1503,6 +1503,7 @@ endif
install-isabelle: $(GENERATED_PREFIX_ISABELLE)/last_build
install_local:: install-isabelle
install:: install-isabelle
clean::
......
......@@ -31,6 +31,9 @@ why3_open "list/Nth.xml"
lemma nth_eq: "0 \<le> i \<Longrightarrow> nat i < length xs \<Longrightarrow> nth i xs = Some (xs ! nat i)"
by (induct xs arbitrary: i) (auto simp add: nat_diff_distrib)
why3_vc is_none_spec
by (simp add: is_none_def option.disc_eq_case(1))
why3_end
......@@ -73,6 +76,9 @@ next
qed simp
qed
why3_vc is_none_spec
by (simp add: NthLength.is_none_def option.disc_eq_case(1))
why3_end
......@@ -80,6 +86,9 @@ section {* Head and tail *}
why3_open "list/HdTl.xml"
why3_vc is_none_spec
by (simp add: HdTl.is_none_def option.disc_eq_case(1))
why3_end
......@@ -103,6 +112,9 @@ why3_vc Nth_tl
why3_vc Nth0_head
by (simp add: hd_def split: list.split)
why3_vc is_none_spec
by (simp add: NthHdTl.is_none_def option.disc_eq_case(1))
why3_end
......@@ -150,6 +162,9 @@ next
with assms show ?thesis by (simp add: nth_none_2)
qed
why3_vc is_none_spec
by (simp add: NthLengthAppend.is_none_def option.disc_eq_case(1))
why3_end
......
......@@ -6,26 +6,25 @@ section {* Generic Maps *}
why3_open "map/Map.xml"
why3_vc Select_eq
using assms
by simp
why3_vc Select_neq
using assms
by simp
why3_vc set_def by auto
why3_end
section {* Constant Maps *}
definition abs_const :: "'a \<Rightarrow> ('b \<Rightarrow> 'a)" where
"abs_const v y = v"
why3_open "map/Const.xml"
constants
const=abs_const
why3_vc Const by simp
why3_vc const_def
by (simp add: abs_const_def)
why3_end
section {* Number of occurrences *}
definition occ :: "'a \<Rightarrow> (int \<Rightarrow> 'a) \<Rightarrow> int \<Rightarrow> int \<Rightarrow> int" where
......@@ -92,8 +91,44 @@ proof -
then show ?thesis by (simp add: occ_def)
qed
why3_end
(* We use occ_append to decompose into {l..<i} {i} {i+1..<j} {j} {j+1..<u} and this complete the
proof
*)
lemma occ_exchange2:
assumes "l \<le> i \<and> i < u \<and> l \<le> j \<and> j < u \<and> i < j"
shows "occ z (m(i := x, j := y)) l u = occ z (m(i := y, j := x)) l u"
proof -
from assms have h1:
"occ z (m (i := x, j := y)) l i + occ z (m (i := x, j := y)) i (i+1) + occ z (m (i := x, j := y)) (i+1) j +
occ z (m (i := x, j := y)) j (j+1) + occ z (m (i := x, j := y)) (j+1) u =
occ z (m (i := x, j := y)) l u"
by (smt occ_append)
from assms have h2:
"occ z (m (i := y, j := x)) l i + occ z (m (i := y, j := x)) i (i+1) + occ z (m (i := y, j := x)) (i+1) j +
occ z (m (i := y, j := x)) j (j+1) + occ z (m (i := y, j := x)) (j+1) u =
occ z (m (i := y, j := x)) l u"
by (smt occ_append)
show ?thesis
by (smt h1 h2 assms facts.set_def occ_bounds(1) occ_eq occ_exists occ_right_add)
qed
why3_vc occ_exchange
using assms
by (smt fun_upd_twist occ_exchange2)
why3_vc occ_left_add
proof -
from assms have "{l..<u} = {l} \<union> {l + 1..<u}" by auto
with assms show ?thesis by (simp add: occ_def)
qed
why3_vc occ_left_no_add
proof -
from assms have "{l..<u} = {l} \<union> {l + 1..<u}" by auto
with assms show ?thesis by (simp add: occ_def)
qed
why3_end
why3_open "map/MapPermut.xml"
......
......@@ -30,6 +30,10 @@ why3_vc even_2k by simp
why3_vc odd_2k1 by simp
why3_vc even_mod2
apply (simp add: even_def cmod_def)
by (metis abs_mult abs_mult_sgn abs_numeral mult.assoc mult_zero_right zmod_eq_0_iff)
why3_end
......@@ -37,7 +41,8 @@ section {* Divisibility *}
why3_open "number/Divisibility.xml"
why3_vc divides_def by (simp add: dvd_def mult.commute)
why3_vc divides_def
by (metis ComputerDivision.facts.Div_mod abs_mult add.right_neutral cmod_def dvd_0_left_iff dvd_def mult_zero_right zmod_eq_0_iff)
why3_vc divides_refl by simp
......@@ -102,6 +107,9 @@ why3_vc even_divides ..
why3_vc odd_divides ..
why3_vc divides_spec
by (metis divides_factorl dvd_div_mult_self)
why3_end
......
......@@ -30,6 +30,10 @@ why3_vc even_2k by simp
why3_vc odd_2k1 by simp
why3_vc even_mod2
apply (simp add: even_def cmod_def)
by (metis abs_mult abs_mult_sgn abs_numeral mult.assoc mult_zero_right zmod_eq_0_iff)
why3_end
......@@ -37,7 +41,8 @@ section {* Divisibility *}
why3_open "number/Divisibility.xml"
why3_vc divides_def by (simp add: dvd_def mult.commute)
why3_vc divides_def
by (metis ComputerDivision.facts.Div_mod abs_mult add.right_neutral cmod_def dvd_0_left_iff dvd_def mult_zero_right zmod_eq_0_iff)
why3_vc divides_refl by simp
......@@ -102,6 +107,9 @@ why3_vc even_divides ..
why3_vc odd_divides ..
why3_vc divides_spec
by (metis divides_factorl dvd_div_mult_self)
why3_end
......
......@@ -144,6 +144,8 @@ why3_vc Zero by auto
why3_vc Monotonic using assms by auto
why3_vc Injective using assms by auto
why3_end
section {* Various truncation functions *}
......
......@@ -147,6 +147,8 @@ why3_vc Zero by auto
why3_vc Monotonic using assms by auto
why3_vc Injective using assms by auto
why3_end
section {* Various truncation functions *}
......
theory Why3_Set
imports Why3_Setup "~~/src/HOL/Library/FSet"
imports Why3_Setup Why3_Map "~~/src/HOL/Library/FSet"
begin
section {* Potentially infinite sets *}
definition choose :: "'a set \<Rightarrow> 'a" where
"choose S = (\<some>x. x \<in> S)"
definition choose_elt :: "('a \<Rightarrow> bool) \<Rightarrow> 'a" where
"choose_elt S = (\<some>x. S x)"
definition complement :: "('a \<Rightarrow> bool) \<Rightarrow> 'a \<Rightarrow> bool" where
"complement S v = Not (S v)"
why3_open "set/Set.xml"
constants
mem = Set.member
empty = bot
add = insert
remove = Set.remove
union = sup
inter = inf
diff = minus
choose = choose
complement = complement
choose = choose_elt
all = top
types
set = set
why3_vc all_def by simp
why3_vc add_spec by (auto simp add: mem_def)
why3_vc add_def1 by simp
why3_vc diff_def by simp
why3_vc diff_def1 by simp
why3_vc diff_spec by (simp add: mem_def)
why3_vc mem_empty by simp
why3_vc inter_def by simp
why3_vc add_remove
using assms
by (auto simp add: remove_def)
why3_vc mem_empty by (simp add: const_def mem_def set.Set.is_empty_def)
why3_vc remove_add by (simp add: remove_def)
why3_vc union_def by simp
why3_vc choose_def
why3_vc add_remove
using assms
by (auto simp add: is_empty_def choose_def intro: someI_ex)
by (simp add: fun_upd_idem_iff mem_def)
why3_vc empty_def1 by (simp add: is_empty_def)
why3_vc inter_spec by (simp add: mem_def)
why3_vc inter_def1 by simp
why3_vc remove_add by auto
why3_vc union_def1 by simp
why3_vc union_spec
by (simp add: mem_def)
why3_vc remove_def1 by (auto simp add: remove_def)
why3_vc choose_spec
by (metis assms choose_elt_def mem_def set.Set.is_empty_def tfl_some)
why3_vc subset_diff by auto
why3_vc remove_spec
by (simp add: mem_def)
why3_vc subset_def by auto
why3_vc subset_diff
by (simp add: diff_spec subset_def)
why3_vc subset_refl by simp
why3_vc subset_refl
by (simp add: subset_def)
why3_vc subset_trans
using assms
by simp
by (meson H1 H2 subset_def)
why3_vc subset_remove
by (simp add: remove_spec subset_def)
why3_vc subset_remove by (auto simp add: remove_def)
why3_vc complement_def
by (simp add: complement_def)
why3_vc extensionality
using assms
by simp
why3_vc infix_eqeq_def by auto
by (auto simp add: infix_eqeq_def mem_def)
why3_end
......@@ -76,6 +81,12 @@ definition fremove :: "'a \<Rightarrow> 'a fset \<Rightarrow> 'a fset" where
definition fchoose :: "'a fset \<Rightarrow> 'a" where
"fchoose S = (\<some>x. x |\<in>| S)"
definition ext_eq :: "'a fset \<Rightarrow> 'a fset \<Rightarrow> bool" where
"ext_eq S1 S2 = (S1 = S2)"
definition is_empty :: "'a fset \<Rightarrow> bool" where
"is_empty S = (S = fempty)"
why3_open "set/Fset.xml"
constants
mem = fmember
......@@ -87,14 +98,13 @@ why3_open "set/Fset.xml"
diff = minus
choose = fchoose
all = top
infix_eqeq = ext_eq
subset = fsubset_eq
is_empty = is_empty
types
set = fset
why3_vc add_def1 by simp
why3_vc diff_def1 by simp
why3_vc mem_empty by simp
why3_vc add_spec by simp
why3_vc add_remove
using assms
......@@ -102,22 +112,16 @@ why3_vc add_remove
why3_vc remove_add by (simp add: fremove_def)
why3_vc choose_def
using assms
by (auto simp add: is_empty_def fchoose_def intro: someI_ex)
why3_vc empty_def1 by (simp add: is_empty_def)
why3_vc empty_def by (simp add: is_empty_def)
why3_vc inter_def1 by simp
why3_vc inter_spec by simp
why3_vc union_def1 by simp
why3_vc union_spec by simp
why3_vc remove_def1 by (auto simp add: fremove_def)
why3_vc remove_spec by (auto simp add: fremove_def)
why3_vc subset_diff by auto
why3_vc subset_def by auto
why3_vc subset_refl by simp
why3_vc subset_trans
......@@ -126,11 +130,17 @@ why3_vc subset_trans
why3_vc subset_remove by (auto simp add: fremove_def)
why3_vc subset_eq
using assms ext_eq_def fcard_seteq by fastforce
why3_vc subset_spec by auto
why3_vc infix_eqeq_spec
by (metis ext_eq_def fsubset_antisym subset_spec)
why3_vc extensionality
using assms
by simp
why3_vc infix_eqeq_def by auto
by (auto simp add: ext_eq_def)
why3_vc cardinal1
proof (cases s rule: fset_strong_cases)
......@@ -174,8 +184,15 @@ why3_vc cardinal_subset
using assms
by (simp add: fcard_mono)
why3_vc subset_eq
by (metis H1 H2 fcard_seteq nat_int order_refl)
why3_vc diff_spec by simp
why3_vc choose_spec
using assms
using Why3_Set.is_empty_def
by (metis (full_types) ex_fin_conv fchoose_def someI_ex)
why3_vc is_empty_spec
by (simp add: Why3_Set.is_empty_def)
why3_end
......
theory Why3_Set
imports
Why3_Setup
Why3_Map
"HOL-Library.FSet"
begin
section {* Potentially infinite sets *}
definition choose_elt :: "'a set \<Rightarrow> 'a" where
"choose_elt S = (\<some>x. x \<in> S)"
definition choose_elt :: "('a \<Rightarrow> bool) \<Rightarrow> 'a" where
"choose_elt S = (\<some>x. S x)"
definition complement :: "('a \<Rightarrow> bool) \<Rightarrow> 'a \<Rightarrow> bool" where
"complement S v = Not (S v)"
why3_open "set/Set.xml"
constants
mem = Set.member
empty = bot
add = insert
remove = Set.remove
union = sup
inter = inf
diff = minus
complement = complement
choose = choose_elt
all = top
types
set = set
why3_vc all_def by simp
why3_vc add_spec by (auto simp add: mem_def)
why3_vc add_def1 by simp
why3_vc diff_def by simp
why3_vc diff_def1 by simp
why3_vc diff_spec by (simp add: mem_def)
why3_vc mem_empty by simp
why3_vc inter_def by simp
why3_vc add_remove
using assms
by (auto simp add: remove_def)
why3_vc mem_empty by (simp add: const_def mem_def set.Set.is_empty_def)
why3_vc remove_add by (simp add: remove_def)
why3_vc union_def by simp
why3_vc choose_def
why3_vc add_remove
using assms
by (auto simp add: is_empty_def choose_elt_def intro: someI_ex)
by (simp add: fun_upd_idem_iff mem_def)
why3_vc empty_def1 by (simp add: is_empty_def)
why3_vc inter_spec by (simp add: mem_def)
why3_vc inter_def1 by simp
why3_vc remove_add by auto
why3_vc union_def1 by simp
why3_vc union_spec
by (simp add: mem_def)
why3_vc remove_def1 by (auto simp add: remove_def)
why3_vc choose_spec
by (metis assms choose_elt_def mem_def set.Set.is_empty_def tfl_some)
why3_vc subset_diff by auto
why3_vc remove_spec
by (simp add: mem_def)
why3_vc subset_def by auto
why3_vc subset_diff
by (simp add: diff_spec subset_def)
why3_vc subset_refl by simp
why3_vc subset_refl
by (simp add: subset_def)
why3_vc subset_trans
using assms
by simp
by (meson H1 H2 subset_def)
why3_vc subset_remove
by (simp add: remove_spec subset_def)
why3_vc subset_remove by (auto simp add: remove_def)
why3_vc complement_def
by (simp add: complement_def)
why3_vc extensionality
using assms
by simp
why3_vc infix_eqeq_def by auto
by (auto simp add: infix_eqeq_def mem_def)
why3_end
......@@ -78,6 +84,12 @@ definition fremove :: "'a \<Rightarrow> 'a fset \<Rightarrow> 'a fset" where
definition fchoose :: "'a fset \<Rightarrow> 'a" where
"fchoose S = (\<some>x. x |\<in>| S)"
definition ext_eq :: "'a fset \<Rightarrow> 'a fset \<Rightarrow> bool" where
"ext_eq S1 S2 = (S1 = S2)"
definition is_empty :: "'a fset \<Rightarrow> bool" where
"is_empty S = (S = fempty)"
why3_open "set/Fset.xml"
constants
mem = fmember
......@@ -89,14 +101,13 @@ why3_open "set/Fset.xml"
diff = minus
choose = fchoose
all = top
infix_eqeq = ext_eq
subset = fsubset_eq
is_empty = is_empty
types
set = fset
why3_vc add_def1 by simp
why3_vc diff_def1 by simp
why3_vc mem_empty by simp
why3_vc add_spec by simp
why3_vc add_remove
using assms
......@@ -104,22 +115,16 @@ why3_vc add_remove
why3_vc remove_add by (simp add: fremove_def)
why3_vc choose_def
using assms
by (auto simp add: is_empty_def fchoose_def intro: someI_ex)
why3_vc empty_def1 by (simp add: is_empty_def)
why3_vc empty_def by (simp add: is_empty_def)
why3_vc inter_def1 by simp
why3_vc inter_spec by simp
why3_vc union_def1 by simp
why3_vc union_spec by simp
why3_vc remove_def1 by (auto simp add: fremove_def)
why3_vc remove_spec by (auto simp add: fremove_def)
why3_vc subset_diff by auto
why3_vc subset_def by auto
why3_vc subset_refl by simp
why3_vc subset_trans
......@@ -128,11 +133,17 @@ why3_vc subset_trans
why3_vc subset_remove by (auto simp add: fremove_def)
why3_vc subset_eq
using assms ext_eq_def fcard_seteq by fastforce
why3_vc subset_spec by auto
why3_vc infix_eqeq_spec
by (metis ext_eq_def fsubset_antisym subset_spec)
why3_vc extensionality
using assms
by simp
why3_vc infix_eqeq_def by auto
by (auto simp add: ext_eq_def)
why3_vc cardinal1
proof (cases s rule: fset_strong_cases)
......@@ -176,8 +187,15 @@ why3_vc cardinal_subset
using assms
by (simp add: fcard_mono)
why3_vc subset_eq
by (metis H1 H2 fcard_seteq nat_int order_refl)
why3_vc diff_spec by simp
why3_vc choose_spec
using assms
using Why3_Set.is_empty_def
by (metis (full_types) ex_fin_conv fchoose_def someI_ex)
why3_vc is_empty_spec
by (simp add: Why3_Set.is_empty_def)
why3_end
......
d930a7d62b70978e95b402b731c207e966ff4a0d int/Abs.xml
f8da2290ab9efa10c6f256d58a78cb6e470cb687 int/ComputerDivision.xml
694f7a0ed680e52547c59e7b5de26696661ab6ae int/Div2.xml
b8ded44a92ca38ab10ebf75e2bff9f3b328298dd int/EuclideanDivision.xml
9c8cdaa53f4f26ff7c7f945f02005708f14cc4b7 int/Int.xml
3219bc19b2780bd089793c024ebf9d12a9fa0e80 int/MinMax.xml
0c2663e30b6957e81ba9900671b1e660f8bcb822 int/Power.xml
420feaaa04035926c167d0ea4ff70719f18284da bool/Bool.xml
0d7cc11e85d68d02186433e107d881d5e8d2dde5 real/Real.xml
9db9ea3382b6698b98a001f1807199bb1efae33b real/RealInfix.xml
24b3449e73d4350721f67ffd731bdf86d408673e real/Abs.xml
13d66b5c7059cb75756dde3d9e81db9835dbeb3d real/MinMax.xml
60bd1de26e8780aba11ebadb6490014b1cf6d8b1 real/FromInt.xml
fb03145930b3ad7defe79ca1c78689b152565db5 real/Truncate.xml
81cfe1277578642ac0090dd21ab1df7d775812ba real/Square.xml
89c5bb2494a3d1e722f2c92b8b98448dc25fefbb real/ExpLog.xml
f02f14ff154479d434db113ebc782f9b5b3178f4 real/Trigonometry.xml
7a238fa2ec522c16fde75f6ad1bd8f7003568e52 real/PowerInt.xml
3e26fcc15ee4da886f36bf367eb039c4a1b05c67 number/Divisibility.xml
ded440a61cc23b77a6e4dc3eccb763376a4ce82b number/Gcd.xml
edd3974ff648ced9fc76c252c5e44e39b4b66a4c number/Parity.xml
981d2f1d534d1f4c5644d6a60f63cfb9cf9bf11c number/Prime.xml
313948a8acfc6c1cbbc7ddc23891255a32a1e152 number/Coprime.xml
82bf3f4c401ffd8384798de755e9cec1245e83e0 set/Set.xml
6cf1aae19d269f9eb81bebd88e33e01de72a5833 set/Fset.xml
234c17ca154b9ada6969b5b61ac6c5d240a56809 map/Map.xml
6eecce0c7dfc7345cccbec4f6a291af473d1ee02 map/Const.xml
4df5bb606a29e27231d09449680cb5266b3fa593 map/Occ.xml
7f1db7a087de78b983d9807ba578c7428113942a map/MapPermut.xml
ec802c583394bbd169cf4fd6688f44afbfb4b4e2 map/MapInjection.xml
8c8f7cf7e53779a9261e57bb00d1b476e8deeed1 list/List.xml
ff0cb7fb85c291dc2ac6d5e0a31ab6ab8e82a47b list/Length.xml
cd19ae86656914c1c824c6e31093e7452e9a07e1 list/Mem.xml
ab66070351d007376beb66c217b5840927ca5d91 list/Nth.xml
6be4c50f7b5a903c115890321e90e939489bd8de list/NthNoOpt.xml
90151ebd29578ed391f07118d9e14a1f243308e1 list/NthLength.xml
1f52a0f1d1530fdb84127b224f394a6090f2f839 list/HdTl.xml
58732a30ff52ff3497808413708f4cac68ab9188 list/NthHdTl.xml
6da5043142c3c716bf7fa5d021834028a52ef933 list/Append.xml
08eba70a27588e0081ee3ff88b84e01a79ea4d2a list/NthLengthAppend.xml
db0385bc0d49a2201acfbbde0323290d9be390d2 list/Reverse.xml
8266b7a315794ca1b93c0fdf4e783fc830fc3cc2 list/HdTlNoOpt.xml
c4d005485d8103874160640bc713a4b1b1dcf537 list/RevAppend.xml
24373bcf350857e4e2be9df045b8725719bdcfbe list/Combine.xml
77696caef931d907fee0a667d67fd8be67b61a6b list/Distinct.xml
ca5689339ccb61a1e710e21b723ee5137791ee7d list/NumOcc.xml
3303d47fe19ca80d65c9c8eec39a3ecf733c425c list/Permut.xml
0f77cea4db3270755b9ceadbdac9470377cf0c1d bv/Pow2int.xml
ea7b087f596c2e00cbedee7c8bdc919b29988b32 bv/BV8.xml
337eb70c810785704db1588053184b7da4c3fb66 bv/BV16.xml
77ea2bf452fbfde9bc593c118335a91601a920f4 bv/BV32.xml
d9384d3754127eb7b8dc86ac2d9569cd276d179e bv/BV64.xml
557ab34ed0b97f6226e8595cd190bab621c438f7 bv/BVConverter_32_64.xml
f1fabd8e2eb129492a44e663982796b99f53642e bv/BVConverter_16_64.xml
6ceeb3f8e2bc8a0a7cec0c26c3ce3c601c35c4af bv/BVConverter_8_64.xml
21f141cbe58e8c962d32f4c92f6ef64129e0d5fd bv/BVConverter_16_32.xml
0d35d6284ec6c02ab585c4313d15020e7fba4b5a bv/BVConverter_8_32.xml
2a029587c3f2665e0e080b10a6833ccceab69ef9 bv/BVConverter_8_16.xml
1cb9ef812bdf895d6a004846c7f520389463bb15 int/Abs.xml