Commit 04ff49e1 authored by MARCHE Claude's avatar MARCHE Claude

updated obsolete sessions

parent 6d133aba
......@@ -35,7 +35,7 @@
locfile="../add_list.mlw"
loclnum="32" loccnumb="8" loccnume="11"
expl="VC for sum"
sum="72c83e84b67c41630bc8294cd68c64f5"
sum="0a492f8ad504c050cdce87f294c7e321"
proved="true"
expanded="true"
shape="Cainfix =c0.0aadd_realV0Aainfix =c0aadd_intV0aNilCainfix =V4aadd_realV0Aainfix =ainfix +V5V3aadd_intV0aIntegerVainfix =ainfix +.V6V4aadd_realV0Aainfix =V3aadd_intV0aRealVV1Iainfix =V4aadd_realV2Aainfix =V3aadd_intV2FACfaNilainfix =V7V2aConswVV0aConsVVV0F">
......@@ -71,7 +71,7 @@
locfile="../add_list.mlw"
loclnum="45" loccnumb="4" loccnume="8"
expl="VC for main"
sum="ecbcde4cd071b18e708a736b4cdd0a7a"
sum="e4ee17c3f0db6f44050cfe5e902ce0cf"
proved="true"
expanded="true"
shape="ainfix =V2c4.7Aainfix =V1c22Iainfix =V2aadd_realV0Aainfix =V1aadd_intV0FLaConsaIntegerc5aConsaRealc3.3aConsaIntegerc8aConsaRealc1.4aConsaIntegerc9aNil">
......@@ -106,7 +106,7 @@
locfile="../add_list.mlw"
loclnum="64" loccnumb="4" loccnume="7"
expl="VC for sum"
sum="83604e216310af600dfb7ba405d37f6f"
sum="0f9b53b209abc77940c4947079bdeb93"
proved="true"
expanded="true"
shape="ifCainfix =V2aadd_realV0Aainfix =V3aadd_intV0aNilCfaNilainfix =V8V7aConswVV1Aainfix =ainfix +.V2aadd_realV7aadd_realV0Aainfix =ainfix +V6aadd_intV7aadd_intV0Iainfix =V7V5FIainfix =V6ainfix +V3V4FaConsaIntegerVVCfaNilainfix =V13V12aConswVV1Aainfix =ainfix +.V11aadd_realV12aadd_realV0Aainfix =ainfix +V3aadd_intV12aadd_intV0Iainfix =V12V10FIainfix =V11ainfix +.V2V9FaConsaRealVVV1tIainfix =ainfix +.V2aadd_realV1aadd_realV0Aainfix =ainfix +V3aadd_intV1aadd_intV0FAainfix =ainfix +.c0.0aadd_realV0aadd_realV0Aainfix =ainfix +c0aadd_intV0aadd_intV0F">
......@@ -134,7 +134,7 @@
locfile="../add_list.mlw"
loclnum="88" loccnumb="4" loccnume="8"
expl="VC for main"
sum="9e8d6db4780d4242bc778a1123f8969f"
sum="bd44a1ba46c51b25c11a2cfdaf1b3abd"
proved="true"
expanded="true"
shape="ainfix =V2c4.7Aainfix =V1c22Iainfix =V2aadd_realV0Aainfix =V1aadd_intV0FLaConsaIntegerc5aConsaRealc3.3aConsaIntegerc8aConsaRealc1.4aConsaIntegerc9aNil">
......
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......@@ -20,7 +20,7 @@
locfile="../algo64.mlw"
loclnum="42" loccnumb="10" loccnume="19"
expl="VC for quicksort"
sum="e35b0a38cfcc5561e3cdee6d65d70f37"
sum="a0ba4e5c3604987c94637a32a37c6bda"
proved="true"
expanded="true"
shape="iasorted_subV1V2ainfix +V3c1Aapermut_subV4V4V2ainfix +V3c1asorted_subV11V2ainfix +V3c1Aapermut_subV4V12V2ainfix +V3c1Aaqs_partitionV10V12V2V3V6V5c42Iasorted_subV11V6ainfix +V3c1Aapermut_subV10V12V6ainfix +V3c1Aainfix <=c0V0Lamk arrayV0V11FAainfix <V3V0Aainfix <=V6V3Aainfix <=c0V6Aainfix <ainfix -V3V6ainfix -V3V2Aainfix <=c0ainfix -V3V2Aaqs_partitionV8V10V2V3V6V5c42Iasorted_subV9V2ainfix +V5c1Aapermut_subV8V10V2ainfix +V5c1Aainfix <=c0V0Lamk arrayV0V9FAainfix <V5V0Aainfix <=V2V5Aainfix <=c0V2Aainfix <ainfix -V5V2ainfix -V3V2Aainfix <=c0ainfix -V3V2Iainfix >=agetV7V13c42Iainfix <=V13V3Aainfix <=V6V13FAainfix =agetV7V14c42Iainfix <V14V6Aainfix <V5V14FAainfix <=agetV7V15c42Iainfix <=V15V5Aainfix <=V2V15FAapermut_subV4V8V2ainfix +V3c1Aainfix <=V6V3Aainfix <V5V6Aainfix <=V2V5Aainfix <=c0V0Lamk arrayV0V7FAainfix <V3V0Aainfix <V2V3Aainfix <=c0V2ainfix <V2V3Iainfix <V3V0Aainfix <=V2V3Aainfix <=c0V2Aainfix <=c0V0Lamk arrayV0V1F">
......@@ -35,7 +35,7 @@
locfile="../algo64.mlw"
loclnum="42" loccnumb="10" loccnume="19"
expl="1. precondition"
sum="1f818119f549fd3aa39712ef78dab021"
sum="e1f73adaa81d119e1d0e5773a0d17f31"
proved="true"
expanded="false"
shape="preconditionainfix <V3V0Aainfix <V2V3Aainfix <=c0V2Iainfix <V2V3Iainfix <V3V0Aainfix <=V2V3Aainfix <=c0V2Aainfix <=c0V0Lamk arrayV0V1F">
......@@ -55,7 +55,7 @@
locfile="../algo64.mlw"
loclnum="42" loccnumb="10" loccnume="19"
expl="2. variant decrease"
sum="c603e9c4679d7be7e14531f5504353b6"
sum="7dc1c60e6b6c8e90e40cffb3c0046c34"
proved="true"
expanded="false"
shape="variant decreaseainfix <ainfix -V5V2ainfix -V3V2Aainfix <=c0ainfix -V3V2Iainfix >=agetV7V9c42Iainfix <=V9V3Aainfix <=V6V9FAainfix =agetV7V10c42Iainfix <V10V6Aainfix <V5V10FAainfix <=agetV7V11c42Iainfix <=V11V5Aainfix <=V2V11FAapermut_subV4V8V2ainfix +V3c1Aainfix <=V6V3Aainfix <V5V6Aainfix <=V2V5Aainfix <=c0V0Lamk arrayV0V7FIainfix <V3V0Aainfix <V2V3Aainfix <=c0V2Iainfix <V2V3Iainfix <V3V0Aainfix <=V2V3Aainfix <=c0V2Aainfix <=c0V0Lamk arrayV0V1F">
......@@ -75,7 +75,7 @@
locfile="../algo64.mlw"
loclnum="42" loccnumb="10" loccnume="19"
expl="3. precondition"
sum="776d62f711ad32b74cb6219bae655abf"
sum="a4143c4e9e45f69e96a27ce50d7066c8"
proved="true"
expanded="false"
shape="preconditionainfix <V5V0Aainfix <=V2V5Aainfix <=c0V2Iainfix >=agetV7V9c42Iainfix <=V9V3Aainfix <=V6V9FAainfix =agetV7V10c42Iainfix <V10V6Aainfix <V5V10FAainfix <=agetV7V11c42Iainfix <=V11V5Aainfix <=V2V11FAapermut_subV4V8V2ainfix +V3c1Aainfix <=V6V3Aainfix <V5V6Aainfix <=V2V5Aainfix <=c0V0Lamk arrayV0V7FIainfix <V3V0Aainfix <V2V3Aainfix <=c0V2Iainfix <V2V3Iainfix <V3V0Aainfix <=V2V3Aainfix <=c0V2Aainfix <=c0V0Lamk arrayV0V1F">
......@@ -95,7 +95,7 @@
locfile="../algo64.mlw"
loclnum="42" loccnumb="10" loccnume="19"
expl="4. assertion"
sum="0c538e6162e3250c4d1c543725b37a6c"
sum="d1e7f5d1a857b4c812defb559b1e2e12"
proved="true"
expanded="false"
shape="assertionaqs_partitionV8V10V2V3V6V5c42Iasorted_subV9V2ainfix +V5c1Aapermut_subV8V10V2ainfix +V5c1Aainfix <=c0V0Lamk arrayV0V9FIainfix <V5V0Aainfix <=V2V5Aainfix <=c0V2Iainfix >=agetV7V11c42Iainfix <=V11V3Aainfix <=V6V11FAainfix =agetV7V12c42Iainfix <V12V6Aainfix <V5V12FAainfix <=agetV7V13c42Iainfix <=V13V5Aainfix <=V2V13FAapermut_subV4V8V2ainfix +V3c1Aainfix <=V6V3Aainfix <V5V6Aainfix <=V2V5Aainfix <=c0V0Lamk arrayV0V7FIainfix <V3V0Aainfix <V2V3Aainfix <=c0V2Iainfix <V2V3Iainfix <V3V0Aainfix <=V2V3Aainfix <=c0V2Aainfix <=c0V0Lamk arrayV0V1F">
......@@ -115,7 +115,7 @@
locfile="../algo64.mlw"
loclnum="42" loccnumb="10" loccnume="19"
expl="5. variant decrease"
sum="52c1f43c0f3ca61ec2dbcc10b2dc82e7"
sum="9a0ba93f55083b56dc73b11952971e5d"
proved="true"
expanded="false"
shape="variant decreaseainfix <ainfix -V3V6ainfix -V3V2Aainfix <=c0ainfix -V3V2Iaqs_partitionV8V10V2V3V6V5c42Iasorted_subV9V2ainfix +V5c1Aapermut_subV8V10V2ainfix +V5c1Aainfix <=c0V0Lamk arrayV0V9FIainfix <V5V0Aainfix <=V2V5Aainfix <=c0V2Iainfix >=agetV7V11c42Iainfix <=V11V3Aainfix <=V6V11FAainfix =agetV7V12c42Iainfix <V12V6Aainfix <V5V12FAainfix <=agetV7V13c42Iainfix <=V13V5Aainfix <=V2V13FAapermut_subV4V8V2ainfix +V3c1Aainfix <=V6V3Aainfix <V5V6Aainfix <=V2V5Aainfix <=c0V0Lamk arrayV0V7FIainfix <V3V0Aainfix <V2V3Aainfix <=c0V2Iainfix <V2V3Iainfix <V3V0Aainfix <=V2V3Aainfix <=c0V2Aainfix <=c0V0Lamk arrayV0V1F">
......@@ -135,7 +135,7 @@
locfile="../algo64.mlw"
loclnum="42" loccnumb="10" loccnume="19"
expl="6. precondition"
sum="196affa0195b238cc77863b613388948"
sum="4cf9a6d2fbf230655e81bd9e1077f30c"
proved="true"
expanded="false"
shape="preconditionainfix <V3V0Aainfix <=V6V3Aainfix <=c0V6Iaqs_partitionV8V10V2V3V6V5c42Iasorted_subV9V2ainfix +V5c1Aapermut_subV8V10V2ainfix +V5c1Aainfix <=c0V0Lamk arrayV0V9FIainfix <V5V0Aainfix <=V2V5Aainfix <=c0V2Iainfix >=agetV7V11c42Iainfix <=V11V3Aainfix <=V6V11FAainfix =agetV7V12c42Iainfix <V12V6Aainfix <V5V12FAainfix <=agetV7V13c42Iainfix <=V13V5Aainfix <=V2V13FAapermut_subV4V8V2ainfix +V3c1Aainfix <=V6V3Aainfix <V5V6Aainfix <=V2V5Aainfix <=c0V0Lamk arrayV0V7FIainfix <V3V0Aainfix <V2V3Aainfix <=c0V2Iainfix <V2V3Iainfix <V3V0Aainfix <=V2V3Aainfix <=c0V2Aainfix <=c0V0Lamk arrayV0V1F">
......@@ -155,7 +155,7 @@
locfile="../algo64.mlw"
loclnum="42" loccnumb="10" loccnume="19"
expl="7. assertion"
sum="b6304fb1a587b252f32f8ba5993eb223"
sum="d66e4148760aa8026127ff6e67f9f59e"
proved="true"
expanded="false"
shape="assertionaqs_partitionV10V12V2V3V6V5c42Iasorted_subV11V6ainfix +V3c1Aapermut_subV10V12V6ainfix +V3c1Aainfix <=c0V0Lamk arrayV0V11FIainfix <V3V0Aainfix <=V6V3Aainfix <=c0V6Iaqs_partitionV8V10V2V3V6V5c42Iasorted_subV9V2ainfix +V5c1Aapermut_subV8V10V2ainfix +V5c1Aainfix <=c0V0Lamk arrayV0V9FIainfix <V5V0Aainfix <=V2V5Aainfix <=c0V2Iainfix >=agetV7V13c42Iainfix <=V13V3Aainfix <=V6V13FAainfix =agetV7V14c42Iainfix <V14V6Aainfix <V5V14FAainfix <=agetV7V15c42Iainfix <=V15V5Aainfix <=V2V15FAapermut_subV4V8V2ainfix +V3c1Aainfix <=V6V3Aainfix <V5V6Aainfix <=V2V5Aainfix <=c0V0Lamk arrayV0V7FIainfix <V3V0Aainfix <V2V3Aainfix <=c0V2Iainfix <V2V3Iainfix <V3V0Aainfix <=V2V3Aainfix <=c0V2Aainfix <=c0V0Lamk arrayV0V1F">
......@@ -167,7 +167,7 @@
memlimit="1000"
obsolete="false"
archived="false">
<result status="valid" time="2.76"/>
<result status="valid" time="2.07"/>
</proof>
</goal>
<goal
......@@ -175,7 +175,7 @@
locfile="../algo64.mlw"
loclnum="42" loccnumb="10" loccnume="19"
expl="8. postcondition"
sum="b193f4b5ea77b7165cabb8807c6c6572"
sum="d4f1cbfd97104fff5b918b4646fa6ebd"
proved="true"
expanded="false"
shape="postconditionapermut_subV4V12V2ainfix +V3c1Iaqs_partitionV10V12V2V3V6V5c42Iasorted_subV11V6ainfix +V3c1Aapermut_subV10V12V6ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V11FIainfix &lt;V3V0Aainfix &lt;=V6V3Aainfix &lt;=c0V6Iaqs_partitionV8V10V2V3V6V5c42Iasorted_subV9V2ainfix +V5c1Aapermut_subV8V10V2ainfix +V5c1Aainfix &lt;=c0V0Lamk arrayV0V9FIainfix &lt;V5V0Aainfix &lt;=V2V5Aainfix &lt;=c0V2Iainfix &gt;=agetV7V13c42Iainfix &lt;=V13V3Aainfix &lt;=V6V13FAainfix =agetV7V14c42Iainfix &lt;V14V6Aainfix &lt;V5V14FAainfix &lt;=agetV7V15c42Iainfix &lt;=V15V5Aainfix &lt;=V2V15FAapermut_subV4V8V2ainfix +V3c1Aainfix &lt;=V6V3Aainfix &lt;V5V6Aainfix &lt;=V2V5Aainfix &lt;=c0V0Lamk arrayV0V7FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V2V3Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -195,7 +195,7 @@
locfile="../algo64.mlw"
loclnum="42" loccnumb="10" loccnume="19"
expl="9. postcondition"
sum="61a4f820061df46df3597a58f9ad22df"
sum="60389eea36e3a45af340b262fedda9b3"
proved="true"
expanded="false"
shape="postconditionasorted_subV11V2ainfix +V3c1Iaqs_partitionV10V12V2V3V6V5c42Iasorted_subV11V6ainfix +V3c1Aapermut_subV10V12V6ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V11FIainfix &lt;V3V0Aainfix &lt;=V6V3Aainfix &lt;=c0V6Iaqs_partitionV8V10V2V3V6V5c42Iasorted_subV9V2ainfix +V5c1Aapermut_subV8V10V2ainfix +V5c1Aainfix &lt;=c0V0Lamk arrayV0V9FIainfix &lt;V5V0Aainfix &lt;=V2V5Aainfix &lt;=c0V2Iainfix &gt;=agetV7V13c42Iainfix &lt;=V13V3Aainfix &lt;=V6V13FAainfix =agetV7V14c42Iainfix &lt;V14V6Aainfix &lt;V5V14FAainfix &lt;=agetV7V15c42Iainfix &lt;=V15V5Aainfix &lt;=V2V15FAapermut_subV4V8V2ainfix +V3c1Aainfix &lt;=V6V3Aainfix &lt;V5V6Aainfix &lt;=V2V5Aainfix &lt;=c0V0Lamk arrayV0V7FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V2V3Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -215,7 +215,7 @@
locfile="../algo64.mlw"
loclnum="42" loccnumb="10" loccnume="19"
expl="10. postcondition"
sum="fbd9c334154c5d6e15c0277ed0249b45"
sum="aae5b53b9239e2569042d779508c7be5"
proved="true"
expanded="false"
shape="postconditionapermut_subV4V4V2ainfix +V3c1INainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V2V3Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -235,7 +235,7 @@
locfile="../algo64.mlw"
loclnum="42" loccnumb="10" loccnume="19"
expl="11. postcondition"
sum="b9ffe8049897cbb8388bec6a64ebcee2"
sum="8db76749bdd5a917d54bd193ed583d46"
proved="true"
expanded="false"
shape="postconditionasorted_subV1V2ainfix +V3c1INainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V2V3Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -257,7 +257,7 @@
locfile="../algo64.mlw"
loclnum="58" loccnumb="6" loccnume="8"
expl="VC for qs"
sum="17f4d68797b4d32c933dc3a0d50d1db8"
sum="2f0ea9a2f922d98d2f297799012fc43d"
proved="true"
expanded="false"
shape="iasorted_subV1c0V0Aapermut_allV2V2asorted_subV4c0V0Aapermut_allV2V5Iasorted_subV4c0ainfix +V3c1Aapermut_subV2V5c0ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V4FAainfix &lt;V3V0Aainfix &lt;=c0V3Aainfix &lt;=c0c0Lainfix -V0c1ainfix &gt;V0c0Iainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -272,7 +272,7 @@
locfile="../algo64.mlw"
loclnum="58" loccnumb="6" loccnume="8"
expl="1. precondition"
sum="eb77a1cc047df2f046733ed7101ffe74"
sum="8c00f6934f65e9c39f9c09ab73f91279"
proved="true"
expanded="false"
shape="preconditionainfix &lt;V3V0Aainfix &lt;=c0V3Aainfix &lt;=c0c0Lainfix -V0c1Iainfix &gt;V0c0Iainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -292,7 +292,7 @@
locfile="../algo64.mlw"
loclnum="58" loccnumb="6" loccnume="8"
expl="2. postcondition"
sum="a7a844ad33c4aeb3c3202614f0177666"
sum="01286808ec84d087a5a4b8d7536d0734"
proved="true"
expanded="false"
shape="postconditionapermut_allV2V5Iasorted_subV4c0ainfix +V3c1Aapermut_subV2V5c0ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V4FIainfix &lt;V3V0Aainfix &lt;=c0V3Aainfix &lt;=c0c0Lainfix -V0c1Iainfix &gt;V0c0Iainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -312,7 +312,7 @@
locfile="../algo64.mlw"
loclnum="58" loccnumb="6" loccnume="8"
expl="3. postcondition"
sum="7d4d8c2c6ffba710eeec4c1bfa496bfd"
sum="703f39eec05db1f34c5aa54e58f9632b"
proved="true"
expanded="false"
shape="postconditionasorted_subV4c0V0Iasorted_subV4c0ainfix +V3c1Aapermut_subV2V5c0ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V4FIainfix &lt;V3V0Aainfix &lt;=c0V3Aainfix &lt;=c0c0Lainfix -V0c1Iainfix &gt;V0c0Iainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -332,7 +332,7 @@
locfile="../algo64.mlw"
loclnum="58" loccnumb="6" loccnume="8"
expl="4. postcondition"
sum="23aa129e449a2b3b2ddef5b4cf2c5c6c"
sum="61ef3b42c571d3266a8f4837e66b5612"
proved="true"
expanded="false"
shape="postconditionapermut_allV2V2INainfix &gt;V0c0Iainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -352,7 +352,7 @@
locfile="../algo64.mlw"
loclnum="58" loccnumb="6" loccnume="8"
expl="5. postcondition"
sum="5bc276fb733c13e0a0d893bc2416f31a"
sum="187fbbba680280cd5e202e8e201c087f"
proved="true"
expanded="false"
shape="postconditionasorted_subV1c0V0INainfix &gt;V0c0Iainfix &lt;=c0V0Lamk arrayV0V1F">
......
......@@ -20,7 +20,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="VC for find"
sum="3b7631b9c5db86edafd09d6050a2c079"
sum="9f315f43ee216dc06949bb2cee43c470"
proved="true"
expanded="true"
shape="iainfix &lt;=agetV1V4agetV1V6Iainfix &lt;=V6V3Aainfix &lt;=V4V6FAainfix &lt;=agetV1V7agetV1V4Iainfix &lt;=V7V4Aainfix &lt;=V2V7FAapermut_subV5V5V2ainfix +V3c1iiainfix &lt;=agetV10V4agetV10V12Iainfix &lt;=V12V3Aainfix &lt;=V4V12FAainfix &lt;=agetV10V13agetV10V4Iainfix &lt;=V13V4Aainfix &lt;=V2V13FAapermut_subV5V11V2ainfix +V3c1Aainfix &gt;=agetV10V14agetV10ainfix -V9c1Aainfix =agetV10V14agetV10V15Aainfix &lt;=V15V3Aainfix &lt;=V9V15EIainfix &lt;=V14V3Aainfix &lt;=V9V14FAapermut_subV11V11V2ainfix +V3c1ainfix &lt;=agetV16V4agetV16V18Iainfix &lt;=V18V3Aainfix &lt;=V4V18FAainfix &lt;=agetV16V19agetV16V4Iainfix &lt;=V19V4Aainfix &lt;=V2V19FAapermut_subV5V17V2ainfix +V3c1Aainfix &gt;=agetV16V20agetV16ainfix -V9c1Aainfix =agetV16V20agetV10V21Aainfix &lt;=V21V3Aainfix &lt;=V9V21EIainfix &lt;=V20V3Aainfix &lt;=V9V20FAainfix =agetV16V22agetV10V22Iainfix &lt;V22V9Aainfix &lt;=V2V22FAapermut_subV11V17V2ainfix +V3c1Iainfix &lt;=agetV16V4agetV16V23Iainfix &lt;=V23V3Aainfix &lt;=V4V23FAainfix &lt;=agetV16V24agetV16V4Iainfix &lt;=V24V4Aainfix &lt;=V9V24FAapermut_subV11V17V9ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V16FAainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V9V4Aainfix &lt;=c0V9Aainfix &lt;ainfix -V3V9ainfix -V3V2Aainfix &lt;=c0ainfix -V3V2ainfix &lt;=V9V4Aainfix &lt;=agetV10V25agetV10ainfix +V8c1Aainfix =agetV10V25agetV10V26Aainfix &lt;=V26V8Aainfix &lt;=V2V26EIainfix &lt;=V25V8Aainfix &lt;=V2V25FAapermut_subV11V11V2ainfix +V3c1iainfix &lt;=agetV27V4agetV27V29Iainfix &lt;=V29V3Aainfix &lt;=V4V29FAainfix &lt;=agetV27V30agetV27V4Iainfix &lt;=V30V4Aainfix &lt;=V2V30FAapermut_subV5V28V2ainfix +V3c1Aainfix &gt;=agetV27V31agetV27ainfix -V9c1Aainfix =agetV27V31agetV27V32Aainfix &lt;=V32V3Aainfix &lt;=V9V32EIainfix &lt;=V31V3Aainfix &lt;=V9V31FAapermut_subV28V28V2ainfix +V3c1ainfix &lt;=agetV33V4agetV33V35Iainfix &lt;=V35V3Aainfix &lt;=V4V35FAainfix &lt;=agetV33V36agetV33V4Iainfix &lt;=V36V4Aainfix &lt;=V2V36FAapermut_subV5V34V2ainfix +V3c1Aainfix &gt;=agetV33V37agetV33ainfix -V9c1Aainfix =agetV33V37agetV27V38Aainfix &lt;=V38V3Aainfix &lt;=V9V38EIainfix &lt;=V37V3Aainfix &lt;=V9V37FAainfix =agetV33V39agetV27V39Iainfix &lt;V39V9Aainfix &lt;=V2V39FAapermut_subV28V34V2ainfix +V3c1Iainfix &lt;=agetV33V4agetV33V40Iainfix &lt;=V40V3Aainfix &lt;=V4V40FAainfix &lt;=agetV33V41agetV33V4Iainfix &lt;=V41V4Aainfix &lt;=V9V41FAapermut_subV28V34V9ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V33FAainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V9V4Aainfix &lt;=c0V9Aainfix &lt;ainfix -V3V9ainfix -V3V2Aainfix &lt;=c0ainfix -V3V2ainfix &lt;=V9V4Aainfix &lt;=agetV27V42agetV27ainfix +V8c1Aainfix =agetV27V42agetV10V43Aainfix &lt;=V43V8Aainfix &lt;=V2V43EIainfix &lt;=V42V8Aainfix &lt;=V2V42FAainfix =agetV27V44agetV10V44Iainfix &lt;=V44V3Aainfix &lt;V8V44FAapermut_subV11V28V2ainfix +V3c1Iainfix &lt;=agetV27V4agetV27V45Iainfix &lt;=V45V8Aainfix &lt;=V4V45FAainfix &lt;=agetV27V46agetV27V4Iainfix &lt;=V46V4Aainfix &lt;=V2V46FAapermut_subV11V28V2ainfix +V8c1Aainfix &lt;=c0V0Lamk arrayV0V27FAainfix &lt;V8V0Aainfix &lt;=V4V8Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;ainfix -V8V2ainfix -V3V2Aainfix &lt;=c0ainfix -V3V2ainfix &lt;=V4V8Iainfix &gt;=agetV10V47c42Iainfix &lt;=V47V3Aainfix &lt;=V9V47FAainfix =agetV10V48c42Iainfix &lt;V48V9Aainfix &lt;V8V48FAainfix &lt;=agetV10V49c42Iainfix &lt;=V49V8Aainfix &lt;=V2V49FAapermut_subV5V11V2ainfix +V3c1Aainfix &lt;=V9V3Aainfix &lt;V8V9Aainfix &lt;=V2V8Aainfix &lt;=c0V0Lamk arrayV0V10FAainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2ainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -35,7 +35,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="1. precondition"
sum="69b805c1d73d532ed451e137e2d7ab4f"
sum="fd03b7039f429032b9d0146bf179520f"
proved="true"
expanded="false"
shape="preconditionainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -55,7 +55,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="2. variant decrease"
sum="54c7c55da6f8d7a35c36b1d6d5c78d96"
sum="404c00436e897c8063abf57a1be6cfab"
proved="true"
expanded="false"
shape="variant decreaseainfix &lt;ainfix -V6V2ainfix -V3V2Aainfix &lt;=c0ainfix -V3V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V10c42Iainfix &lt;=V10V3Aainfix &lt;=V7V10FAainfix =agetV8V11c42Iainfix &lt;V11V7Aainfix &lt;V6V11FAainfix &lt;=agetV8V12c42Iainfix &lt;=V12V6Aainfix &lt;=V2V12FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -75,7 +75,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="3. precondition"
sum="4c695774f403b6584101a86de20e6055"
sum="e151c262340ffc210b5f8ccfe6e44e72"
proved="true"
expanded="false"
shape="preconditionainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V10c42Iainfix &lt;=V10V3Aainfix &lt;=V7V10FAainfix =agetV8V11c42Iainfix &lt;V11V7Aainfix &lt;V6V11FAainfix &lt;=agetV8V12c42Iainfix &lt;=V12V6Aainfix &lt;=V2V12FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -95,7 +95,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="4. assertion"
sum="ae2a52f42a7752779f199d854e438b7b"
sum="2f24ced851e10def2853f94462292aa5"
proved="true"
expanded="false"
shape="assertionapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V12Iainfix &lt;=V12V6Aainfix &lt;=V4V12FAainfix &lt;=agetV10V13agetV10V4Iainfix &lt;=V13V4Aainfix &lt;=V2V13FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V14c42Iainfix &lt;=V14V3Aainfix &lt;=V7V14FAainfix =agetV8V15c42Iainfix &lt;V15V7Aainfix &lt;V6V15FAainfix &lt;=agetV8V16c42Iainfix &lt;=V16V6Aainfix &lt;=V2V16FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -115,7 +115,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="5. assertion"
sum="59044844088ff17c6ab3d5bd3a00a35c"
sum="d7f2a69ebbb4ac4a035d1052d5cf4ead"
proved="true"
expanded="false"
shape="assertionainfix =agetV10V12agetV8V12Iainfix &lt;=V12V3Aainfix &lt;V6V12FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V13Iainfix &lt;=V13V6Aainfix &lt;=V4V13FAainfix &lt;=agetV10V14agetV10V4Iainfix &lt;=V14V4Aainfix &lt;=V2V14FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V15c42Iainfix &lt;=V15V3Aainfix &lt;=V7V15FAainfix =agetV8V16c42Iainfix &lt;V16V7Aainfix &lt;V6V16FAainfix &lt;=agetV8V17c42Iainfix &lt;=V17V6Aainfix &lt;=V2V17FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -135,7 +135,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="6. assertion"
sum="50f458cf3cb0ef4991e8aa9d0287e014"
sum="deba71ff882c87f03c0133a25126c23f"
proved="true"
expanded="true"
shape="assertionainfix &lt;=agetV10V12agetV10ainfix +V6c1Aainfix =agetV10V12agetV8V13Aainfix &lt;=V13V6Aainfix &lt;=V2V13EIainfix &lt;=V12V6Aainfix &lt;=V2V12FIainfix =agetV10V14agetV8V14Iainfix &lt;=V14V3Aainfix &lt;V6V14FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V15Iainfix &lt;=V15V6Aainfix &lt;=V4V15FAainfix &lt;=agetV10V16agetV10V4Iainfix &lt;=V16V4Aainfix &lt;=V2V16FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V17c42Iainfix &lt;=V17V3Aainfix &lt;=V7V17FAainfix =agetV8V18c42Iainfix &lt;V18V7Aainfix &lt;V6V18FAainfix &lt;=agetV8V19c42Iainfix &lt;=V19V6Aainfix &lt;=V2V19FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -150,7 +150,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="1. assertion"
sum="23ea31df09aa6cd7f87dc29792a02347"
sum="9e9c9717059e8756dace8ddc12984643"
proved="true"
expanded="true"
shape="assertionainfix =agetV10V12agetV8V13Aainfix &lt;=V13V6Aainfix &lt;=V2V13EIainfix &lt;=V12V6Aainfix &lt;=V2V12FIainfix =agetV10V14agetV8V14Iainfix &lt;=V14V3Aainfix &lt;V6V14FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V15Iainfix &lt;=V15V6Aainfix &lt;=V4V15FAainfix &lt;=agetV10V16agetV10V4Iainfix &lt;=V16V4Aainfix &lt;=V2V16FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V17c42Iainfix &lt;=V17V3Aainfix &lt;=V7V17FAainfix =agetV8V18c42Iainfix &lt;V18V7Aainfix &lt;V6V18FAainfix &lt;=agetV8V19c42Iainfix &lt;=V19V6Aainfix &lt;=V2V19FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -170,7 +170,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="2. assertion"
sum="a7156c9453e5e816af73b9170bf83d18"
sum="35f7aa568361918c464a31a49c71fed0"
proved="true"
expanded="false"
shape="assertionainfix &lt;=agetV10V12agetV10ainfix +V6c1Iainfix =agetV10V12agetV8V13Aainfix &lt;=V13V6Aainfix &lt;=V2V13EIainfix &lt;=V12V6Aainfix &lt;=V2V12FIainfix =agetV10V14agetV8V14Iainfix &lt;=V14V3Aainfix &lt;V6V14FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V15Iainfix &lt;=V15V6Aainfix &lt;=V4V15FAainfix &lt;=agetV10V16agetV10V4Iainfix &lt;=V16V4Aainfix &lt;=V2V16FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V17c42Iainfix &lt;=V17V3Aainfix &lt;=V7V17FAainfix =agetV8V18c42Iainfix &lt;V18V7Aainfix &lt;V6V18FAainfix &lt;=agetV8V19c42Iainfix &lt;=V19V6Aainfix &lt;=V2V19FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -182,7 +182,7 @@
memlimit="1000"
obsolete="false"
archived="false">
<result status="valid" time="0.27"/>
<result status="valid" time="0.11"/>
</proof>
</goal>
</transf>
......@@ -192,7 +192,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="7. variant decrease"
sum="f87e8df9ce3c9b57930f79627a5746e9"
sum="b591c957a65613108a6cf7bcbd73b8af"
proved="true"
expanded="false"
shape="variant decreaseainfix &lt;ainfix -V3V7ainfix -V3V2Aainfix &lt;=c0ainfix -V3V2Iainfix &lt;=V7V4Iainfix &lt;=agetV10V12agetV10ainfix +V6c1Aainfix =agetV10V12agetV8V13Aainfix &lt;=V13V6Aainfix &lt;=V2V13EIainfix &lt;=V12V6Aainfix &lt;=V2V12FIainfix =agetV10V14agetV8V14Iainfix &lt;=V14V3Aainfix &lt;V6V14FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V15Iainfix &lt;=V15V6Aainfix &lt;=V4V15FAainfix &lt;=agetV10V16agetV10V4Iainfix &lt;=V16V4Aainfix &lt;=V2V16FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V17c42Iainfix &lt;=V17V3Aainfix &lt;=V7V17FAainfix =agetV8V18c42Iainfix &lt;V18V7Aainfix &lt;V6V18FAainfix &lt;=agetV8V19c42Iainfix &lt;=V19V6Aainfix &lt;=V2V19FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -212,7 +212,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="8. precondition"
sum="ee29a22e8e82dff830ebf1ce035cd015"
sum="ede4ef32f7823f3c109ae3324635e945"
proved="true"
expanded="false"
shape="preconditionainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V7V4Aainfix &lt;=c0V7Iainfix &lt;=V7V4Iainfix &lt;=agetV10V12agetV10ainfix +V6c1Aainfix =agetV10V12agetV8V13Aainfix &lt;=V13V6Aainfix &lt;=V2V13EIainfix &lt;=V12V6Aainfix &lt;=V2V12FIainfix =agetV10V14agetV8V14Iainfix &lt;=V14V3Aainfix &lt;V6V14FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V15Iainfix &lt;=V15V6Aainfix &lt;=V4V15FAainfix &lt;=agetV10V16agetV10V4Iainfix &lt;=V16V4Aainfix &lt;=V2V16FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V17c42Iainfix &lt;=V17V3Aainfix &lt;=V7V17FAainfix =agetV8V18c42Iainfix &lt;V18V7Aainfix &lt;V6V18FAainfix &lt;=agetV8V19c42Iainfix &lt;=V19V6Aainfix &lt;=V2V19FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -232,7 +232,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="9. assertion"
sum="fabd3a223c8fcd7f1ddea39dcbc44f6d"
sum="ef8b4a3acb8ab9a955789b952b78646e"
proved="true"
expanded="false"
shape="assertionapermut_subV11V13V2ainfix +V3c1Iainfix &lt;=agetV12V4agetV12V14Iainfix &lt;=V14V3Aainfix &lt;=V4V14FAainfix &lt;=agetV12V15agetV12V4Iainfix &lt;=V15V4Aainfix &lt;=V7V15FAapermut_subV11V13V7ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V12FIainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V7V4Aainfix &lt;=c0V7Iainfix &lt;=V7V4Iainfix &lt;=agetV10V16agetV10ainfix +V6c1Aainfix =agetV10V16agetV8V17Aainfix &lt;=V17V6Aainfix &lt;=V2V17EIainfix &lt;=V16V6Aainfix &lt;=V2V16FIainfix =agetV10V18agetV8V18Iainfix &lt;=V18V3Aainfix &lt;V6V18FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V19Iainfix &lt;=V19V6Aainfix &lt;=V4V19FAainfix &lt;=agetV10V20agetV10V4Iainfix &lt;=V20V4Aainfix &lt;=V2V20FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V21c42Iainfix &lt;=V21V3Aainfix &lt;=V7V21FAainfix =agetV8V22c42Iainfix &lt;V22V7Aainfix &lt;V6V22FAainfix &lt;=agetV8V23c42Iainfix &lt;=V23V6Aainfix &lt;=V2V23FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -252,7 +252,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="10. assertion"
sum="c9890ff5a00ab1aeff960fc1b0d167e0"
sum="d8ed605029649a94511249063ab70667"
proved="true"
expanded="false"
shape="assertionainfix =agetV12V14agetV10V14Iainfix &lt;V14V7Aainfix &lt;=V2V14FIapermut_subV11V13V2ainfix +V3c1Iainfix &lt;=agetV12V4agetV12V15Iainfix &lt;=V15V3Aainfix &lt;=V4V15FAainfix &lt;=agetV12V16agetV12V4Iainfix &lt;=V16V4Aainfix &lt;=V7V16FAapermut_subV11V13V7ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V12FIainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V7V4Aainfix &lt;=c0V7Iainfix &lt;=V7V4Iainfix &lt;=agetV10V17agetV10ainfix +V6c1Aainfix =agetV10V17agetV8V18Aainfix &lt;=V18V6Aainfix &lt;=V2V18EIainfix &lt;=V17V6Aainfix &lt;=V2V17FIainfix =agetV10V19agetV8V19Iainfix &lt;=V19V3Aainfix &lt;V6V19FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V20Iainfix &lt;=V20V6Aainfix &lt;=V4V20FAainfix &lt;=agetV10V21agetV10V4Iainfix &lt;=V21V4Aainfix &lt;=V2V21FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V22c42Iainfix &lt;=V22V3Aainfix &lt;=V7V22FAainfix =agetV8V23c42Iainfix &lt;V23V7Aainfix &lt;V6V23FAainfix &lt;=agetV8V24c42Iainfix &lt;=V24V6Aainfix &lt;=V2V24FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -272,7 +272,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="11. assertion"
sum="2233da0d0b7d56d9b99ab392dfe7113a"
sum="1886f7fe52edf0c4ddeb1efae1222573"
proved="true"
expanded="false"
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......@@ -292,7 +292,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="12. postcondition"
sum="8522f277a285e088aa63dfb4f759080d"
sum="2efc5578ada24ca14ca30630d1718b17"
proved="true"
expanded="false"
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......@@ -312,7 +312,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="13. postcondition"
sum="3431b6acc1617a0872f4a0730623b36a"
sum="4ea014183aed12eede01efecfada4a43"
proved="true"
expanded="false"
shape="postconditionainfix &lt;=agetV12V14agetV12V4Iainfix &lt;=V14V4Aainfix &lt;=V2V14FIainfix &gt;=agetV12V15agetV12ainfix -V7c1Aainfix =agetV12V15agetV10V16Aainfix &lt;=V16V3Aainfix &lt;=V7V16EIainfix &lt;=V15V3Aainfix &lt;=V7V15FIainfix =agetV12V17agetV10V17Iainfix &lt;V17V7Aainfix &lt;=V2V17FIapermut_subV11V13V2ainfix +V3c1Iainfix &lt;=agetV12V4agetV12V18Iainfix &lt;=V18V3Aainfix &lt;=V4V18FAainfix &lt;=agetV12V19agetV12V4Iainfix &lt;=V19V4Aainfix &lt;=V7V19FAapermut_subV11V13V7ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V12FIainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V7V4Aainfix &lt;=c0V7Iainfix &lt;=V7V4Iainfix &lt;=agetV10V20agetV10ainfix +V6c1Aainfix =agetV10V20agetV8V21Aainfix &lt;=V21V6Aainfix &lt;=V2V21EIainfix &lt;=V20V6Aainfix &lt;=V2V20FIainfix =agetV10V22agetV8V22Iainfix &lt;=V22V3Aainfix &lt;V6V22FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V23Iainfix &lt;=V23V6Aainfix &lt;=V4V23FAainfix &lt;=agetV10V24agetV10V4Iainfix &lt;=V24V4Aainfix &lt;=V2V24FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V25c42Iainfix &lt;=V25V3Aainfix &lt;=V7V25FAainfix =agetV8V26c42Iainfix &lt;V26V7Aainfix &lt;V6V26FAainfix &lt;=agetV8V27c42Iainfix &lt;=V27V6Aainfix &lt;=V2V27FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -332,7 +332,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="14. postcondition"
sum="c997c1c61fada61690635965c6edf720"
sum="842df88909a89356bcb6501948692214"
proved="true"
expanded="false"
shape="postconditionainfix &lt;=agetV12V4agetV12V14Iainfix &lt;=V14V3Aainfix &lt;=V4V14FIainfix &gt;=agetV12V15agetV12ainfix -V7c1Aainfix =agetV12V15agetV10V16Aainfix &lt;=V16V3Aainfix &lt;=V7V16EIainfix &lt;=V15V3Aainfix &lt;=V7V15FIainfix =agetV12V17agetV10V17Iainfix &lt;V17V7Aainfix &lt;=V2V17FIapermut_subV11V13V2ainfix +V3c1Iainfix &lt;=agetV12V4agetV12V18Iainfix &lt;=V18V3Aainfix &lt;=V4V18FAainfix &lt;=agetV12V19agetV12V4Iainfix &lt;=V19V4Aainfix &lt;=V7V19FAapermut_subV11V13V7ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V12FIainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V7V4Aainfix &lt;=c0V7Iainfix &lt;=V7V4Iainfix &lt;=agetV10V20agetV10ainfix +V6c1Aainfix =agetV10V20agetV8V21Aainfix &lt;=V21V6Aainfix &lt;=V2V21EIainfix &lt;=V20V6Aainfix &lt;=V2V20FIainfix =agetV10V22agetV8V22Iainfix &lt;=V22V3Aainfix &lt;V6V22FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V23Iainfix &lt;=V23V6Aainfix &lt;=V4V23FAainfix &lt;=agetV10V24agetV10V4Iainfix &lt;=V24V4Aainfix &lt;=V2V24FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V25c42Iainfix &lt;=V25V3Aainfix &lt;=V7V25FAainfix =agetV8V26c42Iainfix &lt;V26V7Aainfix &lt;V6V26FAainfix &lt;=agetV8V27c42Iainfix &lt;=V27V6Aainfix &lt;=V2V27FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -352,7 +352,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="15. assertion"
sum="a70b56aad0677963a00e73bc14bade91"
sum="950ce49878cb13cc396d7ecbe65e560b"
proved="true"
expanded="false"
shape="assertionapermut_subV11V11V2ainfix +V3c1INainfix &lt;=V7V4Iainfix &lt;=agetV10V12agetV10ainfix +V6c1Aainfix =agetV10V12agetV8V13Aainfix &lt;=V13V6Aainfix &lt;=V2V13EIainfix &lt;=V12V6Aainfix &lt;=V2V12FIainfix =agetV10V14agetV8V14Iainfix &lt;=V14V3Aainfix &lt;V6V14FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V15Iainfix &lt;=V15V6Aainfix &lt;=V4V15FAainfix &lt;=agetV10V16agetV10V4Iainfix &lt;=V16V4Aainfix &lt;=V2V16FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V17c42Iainfix &lt;=V17V3Aainfix &lt;=V7V17FAainfix =agetV8V18c42Iainfix &lt;V18V7Aainfix &lt;V6V18FAainfix &lt;=agetV8V19c42Iainfix &lt;=V19V6Aainfix &lt;=V2V19FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -372,7 +372,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="16. assertion"
sum="05f7fc3989b5a3b8e72636731712ffc6"
sum="5f18564703b7ce5acc80d98d86f3d0ef"
proved="true"
expanded="false"
shape="assertionainfix &gt;=agetV10V12agetV10ainfix -V7c1Aainfix =agetV10V12agetV10V13Aainfix &lt;=V13V3Aainfix &lt;=V7V13EIainfix &lt;=V12V3Aainfix &lt;=V7V12FIapermut_subV11V11V2ainfix +V3c1INainfix &lt;=V7V4Iainfix &lt;=agetV10V14agetV10ainfix +V6c1Aainfix =agetV10V14agetV8V15Aainfix &lt;=V15V6Aainfix &lt;=V2V15EIainfix &lt;=V14V6Aainfix &lt;=V2V14FIainfix =agetV10V16agetV8V16Iainfix &lt;=V16V3Aainfix &lt;V6V16FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V17Iainfix &lt;=V17V6Aainfix &lt;=V4V17FAainfix &lt;=agetV10V18agetV10V4Iainfix &lt;=V18V4Aainfix &lt;=V2V18FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V19c42Iainfix &lt;=V19V3Aainfix &lt;=V7V19FAainfix =agetV8V20c42Iainfix &lt;V20V7Aainfix &lt;V6V20FAainfix &lt;=agetV8V21c42Iainfix &lt;=V21V6Aainfix &lt;=V2V21FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -392,7 +392,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="17. postcondition"
sum="589c4686b26960c82c273acdb04dccc1"
sum="c0af56367a8e44b115fc67cfbd8ba1f9"
proved="true"
expanded="false"
shape="postconditionapermut_subV5V11V2ainfix +V3c1Iainfix &gt;=agetV10V12agetV10ainfix -V7c1Aainfix =agetV10V12agetV10V13Aainfix &lt;=V13V3Aainfix &lt;=V7V13EIainfix &lt;=V12V3Aainfix &lt;=V7V12FIapermut_subV11V11V2ainfix +V3c1INainfix &lt;=V7V4Iainfix &lt;=agetV10V14agetV10ainfix +V6c1Aainfix =agetV10V14agetV8V15Aainfix &lt;=V15V6Aainfix &lt;=V2V15EIainfix &lt;=V14V6Aainfix &lt;=V2V14FIainfix =agetV10V16agetV8V16Iainfix &lt;=V16V3Aainfix &lt;V6V16FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V17Iainfix &lt;=V17V6Aainfix &lt;=V4V17FAainfix &lt;=agetV10V18agetV10V4Iainfix &lt;=V18V4Aainfix &lt;=V2V18FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V19c42Iainfix &lt;=V19V3Aainfix &lt;=V7V19FAainfix =agetV8V20c42Iainfix &lt;V20V7Aainfix &lt;V6V20FAainfix &lt;=agetV8V21c42Iainfix &lt;=V21V6Aainfix &lt;=V2V21FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -412,7 +412,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="18. postcondition"
sum="2b0e3fb5a17ed6f6202925bbbbcd0dca"
sum="6e9b61a3054446201ff548c8aa4d7285"
proved="true"
expanded="false"
shape="postconditionainfix &lt;=agetV10V12agetV10V4Iainfix &lt;=V12V4Aainfix &lt;=V2V12FIainfix &gt;=agetV10V13agetV10ainfix -V7c1Aainfix =agetV10V13agetV10V14Aainfix &lt;=V14V3Aainfix &lt;=V7V14EIainfix &lt;=V13V3Aainfix &lt;=V7V13FIapermut_subV11V11V2ainfix +V3c1INainfix &lt;=V7V4Iainfix &lt;=agetV10V15agetV10ainfix +V6c1Aainfix =agetV10V15agetV8V16Aainfix &lt;=V16V6Aainfix &lt;=V2V16EIainfix &lt;=V15V6Aainfix &lt;=V2V15FIainfix =agetV10V17agetV8V17Iainfix &lt;=V17V3Aainfix &lt;V6V17FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V18Iainfix &lt;=V18V6Aainfix &lt;=V4V18FAainfix &lt;=agetV10V19agetV10V4Iainfix &lt;=V19V4Aainfix &lt;=V2V19FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V20c42Iainfix &lt;=V20V3Aainfix &lt;=V7V20FAainfix =agetV8V21c42Iainfix &lt;V21V7Aainfix &lt;V6V21FAainfix &lt;=agetV8V22c42Iainfix &lt;=V22V6Aainfix &lt;=V2V22FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -432,7 +432,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="19. postcondition"
sum="de10a6ed85f21880d732e2c09cd67338"
sum="968ca984febbf2d08097cc42c84ee2c8"
proved="true"
expanded="false"
shape="postconditionainfix &lt;=agetV10V4agetV10V12Iainfix &lt;=V12V3Aainfix &lt;=V4V12FIainfix &gt;=agetV10V13agetV10ainfix -V7c1Aainfix =agetV10V13agetV10V14Aainfix &lt;=V14V3Aainfix &lt;=V7V14EIainfix &lt;=V13V3Aainfix &lt;=V7V13FIapermut_subV11V11V2ainfix +V3c1INainfix &lt;=V7V4Iainfix &lt;=agetV10V15agetV10ainfix +V6c1Aainfix =agetV10V15agetV8V16Aainfix &lt;=V16V6Aainfix &lt;=V2V16EIainfix &lt;=V15V6Aainfix &lt;=V2V15FIainfix =agetV10V17agetV8V17Iainfix &lt;=V17V3Aainfix &lt;V6V17FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V18Iainfix &lt;=V18V6Aainfix &lt;=V4V18FAainfix &lt;=agetV10V19agetV10V4Iainfix &lt;=V19V4Aainfix &lt;=V2V19FAapermut_subV9V11V2ainfix +V6c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V6V0Aainfix &lt;=V4V6Aainfix &lt;=V2V4Aainfix &lt;=c0V2Iainfix &lt;=V4V6Iainfix &gt;=agetV8V20c42Iainfix &lt;=V20V3Aainfix &lt;=V7V20FAainfix =agetV8V21c42Iainfix &lt;V21V7Aainfix &lt;V6V21FAainfix &lt;=agetV8V22c42Iainfix &lt;=V22V6Aainfix &lt;=V2V22FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -452,7 +452,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="20. assertion"
sum="65413587627f9713f4db21f264d97a10"
sum="c719c4dceb0aa54e64c18bc610201b30"
proved="true"
expanded="false"
shape="assertionapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V10c42Iainfix &lt;=V10V3Aainfix &lt;=V7V10FAainfix =agetV8V11c42Iainfix &lt;V11V7Aainfix &lt;V6V11FAainfix &lt;=agetV8V12c42Iainfix &lt;=V12V6Aainfix &lt;=V2V12FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -472,7 +472,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="21. assertion"
sum="59685755610ca66a0bcd992f6affbc0f"
sum="619e388fd4f838d87c51573150e7f14b"
proved="true"
expanded="false"
shape="assertionainfix &lt;=agetV8V10agetV8ainfix +V6c1Aainfix =agetV8V10agetV8V11Aainfix &lt;=V11V6Aainfix &lt;=V2V11EIainfix &lt;=V10V6Aainfix &lt;=V2V10FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V12c42Iainfix &lt;=V12V3Aainfix &lt;=V7V12FAainfix =agetV8V13c42Iainfix &lt;V13V7Aainfix &lt;V6V13FAainfix &lt;=agetV8V14c42Iainfix &lt;=V14V6Aainfix &lt;=V2V14FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -492,7 +492,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="22. variant decrease"
sum="a5379a3eb3986c6f61179238e69bf576"
sum="aa82f1a266609fe457789e498106ba3e"
proved="true"
expanded="false"
shape="variant decreaseainfix &lt;ainfix -V3V7ainfix -V3V2Aainfix &lt;=c0ainfix -V3V2Iainfix &lt;=V7V4Iainfix &lt;=agetV8V10agetV8ainfix +V6c1Aainfix =agetV8V10agetV8V11Aainfix &lt;=V11V6Aainfix &lt;=V2V11EIainfix &lt;=V10V6Aainfix &lt;=V2V10FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V12c42Iainfix &lt;=V12V3Aainfix &lt;=V7V12FAainfix =agetV8V13c42Iainfix &lt;V13V7Aainfix &lt;V6V13FAainfix &lt;=agetV8V14c42Iainfix &lt;=V14V6Aainfix &lt;=V2V14FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -512,7 +512,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="23. precondition"
sum="b08ca6319c6706db53be50066e7078cf"
sum="bf9cba714d8d9b38a7349a16da0e8293"
proved="true"
expanded="false"
shape="preconditionainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V7V4Aainfix &lt;=c0V7Iainfix &lt;=V7V4Iainfix &lt;=agetV8V10agetV8ainfix +V6c1Aainfix =agetV8V10agetV8V11Aainfix &lt;=V11V6Aainfix &lt;=V2V11EIainfix &lt;=V10V6Aainfix &lt;=V2V10FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V12c42Iainfix &lt;=V12V3Aainfix &lt;=V7V12FAainfix =agetV8V13c42Iainfix &lt;V13V7Aainfix &lt;V6V13FAainfix &lt;=agetV8V14c42Iainfix &lt;=V14V6Aainfix &lt;=V2V14FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -532,7 +532,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="24. assertion"
sum="11ff321ab44cdc298fadc94521850cf0"
sum="f0bb56f2fe557759fa37822070ec3b90"
proved="true"
expanded="false"
shape="assertionapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V12Iainfix &lt;=V12V3Aainfix &lt;=V4V12FAainfix &lt;=agetV10V13agetV10V4Iainfix &lt;=V13V4Aainfix &lt;=V7V13FAapermut_subV9V11V7ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V7V4Aainfix &lt;=c0V7Iainfix &lt;=V7V4Iainfix &lt;=agetV8V14agetV8ainfix +V6c1Aainfix =agetV8V14agetV8V15Aainfix &lt;=V15V6Aainfix &lt;=V2V15EIainfix &lt;=V14V6Aainfix &lt;=V2V14FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V16c42Iainfix &lt;=V16V3Aainfix &lt;=V7V16FAainfix =agetV8V17c42Iainfix &lt;V17V7Aainfix &lt;V6V17FAainfix &lt;=agetV8V18c42Iainfix &lt;=V18V6Aainfix &lt;=V2V18FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -552,7 +552,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="25. assertion"
sum="ac4993cfdf9515604ed1e7dfbe600237"
sum="7101e902bf2314478b79cf2ae12f0f1f"
proved="true"
expanded="false"
shape="assertionainfix =agetV10V12agetV8V12Iainfix &lt;V12V7Aainfix &lt;=V2V12FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V13Iainfix &lt;=V13V3Aainfix &lt;=V4V13FAainfix &lt;=agetV10V14agetV10V4Iainfix &lt;=V14V4Aainfix &lt;=V7V14FAapermut_subV9V11V7ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V7V4Aainfix &lt;=c0V7Iainfix &lt;=V7V4Iainfix &lt;=agetV8V15agetV8ainfix +V6c1Aainfix =agetV8V15agetV8V16Aainfix &lt;=V16V6Aainfix &lt;=V2V16EIainfix &lt;=V15V6Aainfix &lt;=V2V15FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V17c42Iainfix &lt;=V17V3Aainfix &lt;=V7V17FAainfix =agetV8V18c42Iainfix &lt;V18V7Aainfix &lt;V6V18FAainfix &lt;=agetV8V19c42Iainfix &lt;=V19V6Aainfix &lt;=V2V19FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -572,7 +572,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="26. assertion"
sum="8db39cdea6a5d4e5971097eaa53be1dd"
sum="7039b614caaa8bec365edffe66b88721"
proved="true"
expanded="true"
shape="assertionainfix &gt;=agetV10V12agetV10ainfix -V7c1Aainfix =agetV10V12agetV8V13Aainfix &lt;=V13V3Aainfix &lt;=V7V13EIainfix &lt;=V12V3Aainfix &lt;=V7V12FIainfix =agetV10V14agetV8V14Iainfix &lt;V14V7Aainfix &lt;=V2V14FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V15Iainfix &lt;=V15V3Aainfix &lt;=V4V15FAainfix &lt;=agetV10V16agetV10V4Iainfix &lt;=V16V4Aainfix &lt;=V7V16FAapermut_subV9V11V7ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V7V4Aainfix &lt;=c0V7Iainfix &lt;=V7V4Iainfix &lt;=agetV8V17agetV8ainfix +V6c1Aainfix =agetV8V17agetV8V18Aainfix &lt;=V18V6Aainfix &lt;=V2V18EIainfix &lt;=V17V6Aainfix &lt;=V2V17FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V19c42Iainfix &lt;=V19V3Aainfix &lt;=V7V19FAainfix =agetV8V20c42Iainfix &lt;V20V7Aainfix &lt;V6V20FAainfix &lt;=agetV8V21c42Iainfix &lt;=V21V6Aainfix &lt;=V2V21FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -587,7 +587,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="1. assertion"
sum="1e3431f106381593a083fb4f09a519d8"
sum="bc920b5a7b833b56d7552ddb5b80e5c3"
proved="true"
expanded="true"
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......@@ -607,7 +607,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="2. assertion"
sum="759ac466ec98bb8514a06f7e8171f14a"
sum="c85efc0a01455a1c81a381f8aeefa1a9"
proved="true"
expanded="false"
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......@@ -629,7 +629,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="27. postcondition"
sum="14de51a6c0da38fd3067684364480776"
sum="e380c70cfa91841509eb970592b7f01b"
proved="true"
expanded="false"
shape="postconditionapermut_subV5V11V2ainfix +V3c1Iainfix &gt;=agetV10V12agetV10ainfix -V7c1Aainfix =agetV10V12agetV8V13Aainfix &lt;=V13V3Aainfix &lt;=V7V13EIainfix &lt;=V12V3Aainfix &lt;=V7V12FIainfix =agetV10V14agetV8V14Iainfix &lt;V14V7Aainfix &lt;=V2V14FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V15Iainfix &lt;=V15V3Aainfix &lt;=V4V15FAainfix &lt;=agetV10V16agetV10V4Iainfix &lt;=V16V4Aainfix &lt;=V7V16FAapermut_subV9V11V7ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V7V4Aainfix &lt;=c0V7Iainfix &lt;=V7V4Iainfix &lt;=agetV8V17agetV8ainfix +V6c1Aainfix =agetV8V17agetV8V18Aainfix &lt;=V18V6Aainfix &lt;=V2V18EIainfix &lt;=V17V6Aainfix &lt;=V2V17FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V19c42Iainfix &lt;=V19V3Aainfix &lt;=V7V19FAainfix =agetV8V20c42Iainfix &lt;V20V7Aainfix &lt;V6V20FAainfix &lt;=agetV8V21c42Iainfix &lt;=V21V6Aainfix &lt;=V2V21FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -649,7 +649,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="28. postcondition"
sum="e06a41079ab98136d2075c65fdcd6f83"
sum="802f409969a4aec8d147a2b31cedf52b"
proved="true"
expanded="false"
shape="postconditionainfix &lt;=agetV10V12agetV10V4Iainfix &lt;=V12V4Aainfix &lt;=V2V12FIainfix &gt;=agetV10V13agetV10ainfix -V7c1Aainfix =agetV10V13agetV8V14Aainfix &lt;=V14V3Aainfix &lt;=V7V14EIainfix &lt;=V13V3Aainfix &lt;=V7V13FIainfix =agetV10V15agetV8V15Iainfix &lt;V15V7Aainfix &lt;=V2V15FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V16Iainfix &lt;=V16V3Aainfix &lt;=V4V16FAainfix &lt;=agetV10V17agetV10V4Iainfix &lt;=V17V4Aainfix &lt;=V7V17FAapermut_subV9V11V7ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V7V4Aainfix &lt;=c0V7Iainfix &lt;=V7V4Iainfix &lt;=agetV8V18agetV8ainfix +V6c1Aainfix =agetV8V18agetV8V19Aainfix &lt;=V19V6Aainfix &lt;=V2V19EIainfix &lt;=V18V6Aainfix &lt;=V2V18FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V20c42Iainfix &lt;=V20V3Aainfix &lt;=V7V20FAainfix =agetV8V21c42Iainfix &lt;V21V7Aainfix &lt;V6V21FAainfix &lt;=agetV8V22c42Iainfix &lt;=V22V6Aainfix &lt;=V2V22FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -669,7 +669,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="29. postcondition"
sum="e4eee3d22bc22a243ebe2ac7ac176c5c"
sum="91d1c38faa91aba9418dcd13f270959a"
proved="true"
expanded="false"
shape="postconditionainfix &lt;=agetV10V4agetV10V12Iainfix &lt;=V12V3Aainfix &lt;=V4V12FIainfix &gt;=agetV10V13agetV10ainfix -V7c1Aainfix =agetV10V13agetV8V14Aainfix &lt;=V14V3Aainfix &lt;=V7V14EIainfix &lt;=V13V3Aainfix &lt;=V7V13FIainfix =agetV10V15agetV8V15Iainfix &lt;V15V7Aainfix &lt;=V2V15FIapermut_subV9V11V2ainfix +V3c1Iainfix &lt;=agetV10V4agetV10V16Iainfix &lt;=V16V3Aainfix &lt;=V4V16FAainfix &lt;=agetV10V17agetV10V4Iainfix &lt;=V17V4Aainfix &lt;=V7V17FAapermut_subV9V11V7ainfix +V3c1Aainfix &lt;=c0V0Lamk arrayV0V10FIainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V7V4Aainfix &lt;=c0V7Iainfix &lt;=V7V4Iainfix &lt;=agetV8V18agetV8ainfix +V6c1Aainfix =agetV8V18agetV8V19Aainfix &lt;=V19V6Aainfix &lt;=V2V19EIainfix &lt;=V18V6Aainfix &lt;=V2V18FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V20c42Iainfix &lt;=V20V3Aainfix &lt;=V7V20FAainfix =agetV8V21c42Iainfix &lt;V21V7Aainfix &lt;V6V21FAainfix &lt;=agetV8V22c42Iainfix &lt;=V22V6Aainfix &lt;=V2V22FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -689,7 +689,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="30. assertion"
sum="5aa9c75312a6559936c50c3be9ff341f"
sum="9ab13ce4d91c7892755ed0278f94f3a7"
proved="true"
expanded="false"
shape="assertionapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V7V4Iainfix &lt;=agetV8V10agetV8ainfix +V6c1Aainfix =agetV8V10agetV8V11Aainfix &lt;=V11V6Aainfix &lt;=V2V11EIainfix &lt;=V10V6Aainfix &lt;=V2V10FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V12c42Iainfix &lt;=V12V3Aainfix &lt;=V7V12FAainfix =agetV8V13c42Iainfix &lt;V13V7Aainfix &lt;V6V13FAainfix &lt;=agetV8V14c42Iainfix &lt;=V14V6Aainfix &lt;=V2V14FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -709,7 +709,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="31. assertion"
sum="1a800f3224cd00d5bf48ab4843a115e7"
sum="6b60af46177a8a8a49483c2b25377815"
proved="true"
expanded="false"
shape="assertionainfix &gt;=agetV8V10agetV8ainfix -V7c1Aainfix =agetV8V10agetV8V11Aainfix &lt;=V11V3Aainfix &lt;=V7V11EIainfix &lt;=V10V3Aainfix &lt;=V7V10FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V7V4Iainfix &lt;=agetV8V12agetV8ainfix +V6c1Aainfix =agetV8V12agetV8V13Aainfix &lt;=V13V6Aainfix &lt;=V2V13EIainfix &lt;=V12V6Aainfix &lt;=V2V12FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V14c42Iainfix &lt;=V14V3Aainfix &lt;=V7V14FAainfix =agetV8V15c42Iainfix &lt;V15V7Aainfix &lt;V6V15FAainfix &lt;=agetV8V16c42Iainfix &lt;=V16V6Aainfix &lt;=V2V16FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -729,7 +729,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="32. postcondition"
sum="eda1ab9750d2017acd46359e3bdb8a83"
sum="5457c8a8acc9cf7b1ed7c8589f5f0c4f"
proved="true"
expanded="false"
shape="postconditionapermut_subV5V9V2ainfix +V3c1Iainfix &gt;=agetV8V10agetV8ainfix -V7c1Aainfix =agetV8V10agetV8V11Aainfix &lt;=V11V3Aainfix &lt;=V7V11EIainfix &lt;=V10V3Aainfix &lt;=V7V10FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V7V4Iainfix &lt;=agetV8V12agetV8ainfix +V6c1Aainfix =agetV8V12agetV8V13Aainfix &lt;=V13V6Aainfix &lt;=V2V13EIainfix &lt;=V12V6Aainfix &lt;=V2V12FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V14c42Iainfix &lt;=V14V3Aainfix &lt;=V7V14FAainfix =agetV8V15c42Iainfix &lt;V15V7Aainfix &lt;V6V15FAainfix &lt;=agetV8V16c42Iainfix &lt;=V16V6Aainfix &lt;=V2V16FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -749,7 +749,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="33. postcondition"
sum="20327ea67c7258bfbe21093b59ce73ca"
sum="b6cb1fb20587b71463ee9f1d4959cab6"
proved="true"
expanded="false"
shape="postconditionainfix &lt;=agetV8V10agetV8V4Iainfix &lt;=V10V4Aainfix &lt;=V2V10FIainfix &gt;=agetV8V11agetV8ainfix -V7c1Aainfix =agetV8V11agetV8V12Aainfix &lt;=V12V3Aainfix &lt;=V7V12EIainfix &lt;=V11V3Aainfix &lt;=V7V11FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V7V4Iainfix &lt;=agetV8V13agetV8ainfix +V6c1Aainfix =agetV8V13agetV8V14Aainfix &lt;=V14V6Aainfix &lt;=V2V14EIainfix &lt;=V13V6Aainfix &lt;=V2V13FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V15c42Iainfix &lt;=V15V3Aainfix &lt;=V7V15FAainfix =agetV8V16c42Iainfix &lt;V16V7Aainfix &lt;V6V16FAainfix &lt;=agetV8V17c42Iainfix &lt;=V17V6Aainfix &lt;=V2V17FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -769,7 +769,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="34. postcondition"
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sum="832336eeb7d4da65f00160b971cf6c7d"
proved="true"
expanded="false"
shape="postconditionainfix &lt;=agetV8V4agetV8V10Iainfix &lt;=V10V3Aainfix &lt;=V4V10FIainfix &gt;=agetV8V11agetV8ainfix -V7c1Aainfix =agetV8V11agetV8V12Aainfix &lt;=V12V3Aainfix &lt;=V7V12EIainfix &lt;=V11V3Aainfix &lt;=V7V11FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V7V4Iainfix &lt;=agetV8V13agetV8ainfix +V6c1Aainfix =agetV8V13agetV8V14Aainfix &lt;=V14V6Aainfix &lt;=V2V14EIainfix &lt;=V13V6Aainfix &lt;=V2V13FIapermut_subV9V9V2ainfix +V3c1INainfix &lt;=V4V6Iainfix &gt;=agetV8V15c42Iainfix &lt;=V15V3Aainfix &lt;=V7V15FAainfix =agetV8V16c42Iainfix &lt;V16V7Aainfix &lt;V6V16FAainfix &lt;=agetV8V17c42Iainfix &lt;=V17V6Aainfix &lt;=V2V17FAapermut_subV5V9V2ainfix +V3c1Aainfix &lt;=V7V3Aainfix &lt;V6V7Aainfix &lt;=V2V6Aainfix &lt;=c0V0Lamk arrayV0V8FIainfix &lt;V3V0Aainfix &lt;V2V3Aainfix &lt;=c0V2Iainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -789,7 +789,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="35. postcondition"
sum="78f2dc6d69a2f28530f33db42e75a7f7"
sum="c970b7ef42d66b286b79f116cc1d0c5c"
proved="true"
expanded="false"
shape="postconditionapermut_subV5V5V2ainfix +V3c1INainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -809,7 +809,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="36. postcondition"
sum="48a81905335a0013a4f116b9e97e4a61"
sum="7db365701af31ce5bcf8c766e3e1dc7b"
proved="true"
expanded="false"
shape="postconditionainfix &lt;=agetV1V6agetV1V4Iainfix &lt;=V6V4Aainfix &lt;=V2V6FINainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......@@ -829,7 +829,7 @@
locfile="../algo65.mlw"
loclnum="35" loccnumb="10" loccnume="14"
expl="37. postcondition"
sum="788dcb7fc48af0bb8840d62742befb79"
sum="a6c0c750dca3e92efb7d5006b6c3917d"
proved="true"
expanded="false"
shape="postconditionainfix &lt;=agetV1V4agetV1V6Iainfix &lt;=V6V3Aainfix &lt;=V4V6FINainfix &lt;V2V3Iainfix &lt;V3V0Aainfix &lt;=V4V3Aainfix &lt;=V2V4Aainfix &lt;=c0V2Aainfix &lt;=c0V0Lamk arrayV0V1F">
......
......@@ -28,7 +28,7 @@
locfile="../arm.mlw"
loclnum="16" loccnumb="6" loccnume="20"
expl="VC for insertion_sort"
sum="7a48ddec008b758b68d1b8f7bf242745"
sum="06febdbfc8bb8fcf0669068b174ab836"
proved="true"
expanded="false"
shape="iainfix &lt;=V6c45Aainfix =V7c9Aainfix &lt;=c0V0iainfix &lt;ainfix -c10V16ainfix -c10V5Aainfix &lt;=c0ainfix -c10V5Aainfix &lt;=ainfix *c2V12ainfix *ainfix -V16c2ainfix -V16c1Aainfix =V10ainfix -V16c2AainvV14Aainfix &lt;=V16c11Aainfix &lt;=c2V16Iainfix =V16ainfix +V5c1Fainfix &lt;V22V11Aainfix &lt;=c0V11Aainfix &lt;=ainfix *c2V17ainfix +ainfix *ainfix -V5c2ainfix -V5c1ainfix *c2ainfix -V5V22Aainvamk arrayV0V21Aainfix &lt;=V22V5Aainfix &lt;=c1V22Iainfix =V22ainfix -V11c1FIainfix =V21asetV19V20agetV13V11Aainfix &lt;=c0V0FAainfix &lt;V20V0Aainfix &lt;=c0V20Lainfix -V11c1Iainfix =V19asetV13V11agetV13V18Aainfix &lt;=c0V0FAainfix &lt;V11V0Aainfix &lt;=c0V11Aainfix &lt;V18V0Aainfix &lt;=c0V18Lainfix -V11c1Aainfix &lt;V11V0Aainfix &lt;=c0V11Iainfix =V17ainfix +V12c1Fainfix &lt;agetV13V11agetV13V15Aainfix &lt;V11V0Aainfix &lt;=c0V11Aainfix &lt;V15V0Aainfix &lt;=c0V15Aainfix &lt;=c0V0Lainfix -V11c1Iainfix &lt;=ainfix *c2V12ainfix +ainfix *ainfix -V5c2ainfix -V5c1ainfix *c2ainfix -V5V11AainvV14Aainfix &lt;=V11V5Aainfix &lt;=c1V11Lamk arrayV0V13FAainfix &lt;=ainfix *c2V6ainfix +ainfix *ainfix -V5c2ainfix -V5c1ainfix *c2ainfix -V5V5AainvV9Aainfix &lt;=V5V5Aainfix &lt;=c1V5Iainfix =V10ainfix +V7c1Fainfix &lt;=V5c10Iainfix &lt;=ainfix *c2V6ainfix *ainfix -V5c2ainfix -V5c1Aainfix =V7ainfix -V5c2AainvV9Aainfix &lt;=V5c11Aainfix &lt;=c2V5Lamk arrayV0V8FAainfix &lt;=ainfix *c2V1ainfix *ainfix -c2c2ainfix -c2c1Aainfix =V2ainfix -c2c2AainvV4Aainfix &lt;=c2c11Aainfix &lt;=c2c2Iainfix =V1c0Aainfix =V2c0AainvV4Aainfix &lt;=c0V0Lamk arrayV0V3FF">
......@@ -43,7 +43,7 @@
locfile="../arm.mlw"
loclnum="16" loccnumb="6" loccnume="20"
expl="1. loop invariant init"
sum="16bae8f80b2fdb94a131525dce693d9b"
sum="8cf87b3e070181b8fb5eb9cdbb7b1dc2"
proved="true"
expanded="false"
shape="loop invariant initainfix &lt;=ainfix *c2V1ainfix *ainfix -c2c2ainfix -c2c1Aainfix =V2ainfix -c2c2AainvV4Aainfix &lt;=c2c11Aainfix &lt;=c2c2Iainfix =V1c0Aainfix =V2c0AainvV4Aainfix &lt;=c0V0Lamk arrayV0V3FF">
......@@ -63,7 +63,7 @@
locfile="../arm.mlw"
loclnum="16" loccnumb="6" loccnume="20"
expl="2. loop invariant init"
sum="2ad2da6c3d527b36b5cf669396955001"
sum="ef3a262df36efc96b1d4f339584dfe21"
proved="true"
expanded="false"
shape="loop invariant initainfix &lt;=ainfix *c2V6ainfix +ainfix *ainfix -V5c2ainfix -V5c1ainfix *c2ainfix -V5V5AainvV9Aainfix &lt;=V5V5Aainfix &lt;=c1V5Iainfix =V10ainfix +V7c1FIainfix &lt;=V5c10Iainfix &lt;=ainfix *c2V6ainfix *ainfix -V5c2ainfix -V5c1Aainfix =V7ainfix -V5c2AainvV9Aainfix &lt;=V5c11Aainfix &lt;=c2V5Lamk arrayV0V8FIainfix =V1c0Aainfix =V2c0AainvV4Aainfix &lt;=c0V0Lamk arrayV0V3FF">
......@@ -83,7 +83,7 @@
locfile="../arm.mlw"
loclnum="16" loccnumb="6" loccnume="20"
expl="3. type invariant"
sum="8aa34fcd4d85df8a03e3e75dd114d3bf"
sum="f626a1b9f59d904def75836988e58226"