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vidjil
vidjil
Commits
a6682961
Commit
a6682961
authored
May 07, 2020
by
Mathieu Giraud
Browse files
.gitlab-ci.yml: 'benchmarks.log' as artifact
parent
a6f573c0
Pipeline
#142693
passed with stages
in 43 minutes and 38 seconds
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.gitlab-ci.yml
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a6682961
...
...
@@ -378,6 +378,9 @@ benchmark_algo:
stage
:
benchmark
script
:
-
cd algo/tests ; python3 benchmark-releases.py -r 3 -bIc
artifacts
:
paths
:
-
algo/tests/benchmark.log
when
:
manual
only
:
-
/^feature-.*a.*\/.*$/
...
...
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