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vidjil
vidjil
Commits
8cfdc528
Commit
8cfdc528
authored
Mar 08, 2019
by
Mathieu Giraud
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Merge branch 'feature-a/ensure-tab-after-name' into 'dev'
Ensure tab after name See merge request
!430
parents
4e5cc9f5
977ed0a8
Pipeline
#67343
passed with stages
in 42 minutes and 56 seconds
Changes
4
Pipelines
2
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4 changed files
with
22 additions
and
1 deletion
+22
-1
algo/core/segment.cpp
algo/core/segment.cpp
+1
-1
algo/tests/data/segment-or-not.fa
algo/tests/data/segment-or-not.fa
+11
-0
algo/tests/repseq_vdj.py
algo/tests/repseq_vdj.py
+6
-0
algo/tests/should-get-tests/tabs-in-output.should-get
algo/tests/should-get-tests/tabs-in-output.should-get
+4
-0
No files found.
algo/core/segment.cpp
View file @
8cfdc528
...
...
@@ -361,7 +361,7 @@ string Segmenter::getInfoLine() const
{
string
s
=
""
;
s
+=
(
segmented
?
""
:
"! "
)
+
info
;
s
+=
(
segmented
?
""
:
"
\t
! "
)
+
info
;
s
+=
" "
+
info_extra
;
s
+=
" "
+
segmented_germline
->
code
;
s
+=
" "
+
string
(
segmented_mesg
[
because
])
;
...
...
algo/tests/data/segment-or-not.fa
0 → 100644
View file @
8cfdc528
>lcl|FLN1FA002RWEZA.1|
ggctggagtgggtttcatacattagtagtaatagtggtgccatatactacgcagactctgtgaagggccgattcaccatc
tccagaaacaatgccaaggactcactgtatctgcaaatgaacagcctgagagccgaggacacggctgtgtattactgtgc
gagagcgatcccccggtattactatgatactagtggcccaaacgactactggggccagggaaccctggtcaccgtctcct
cag
>unsegmented
CGAATGCCTACATAGGGCTGGACGGCGTGCGTATTCCGTTACTACGACGATTCAAGGTAGTACAGCAAGACCACTGACCACTCCCGTGAGATATTTACCGAACGCCATTACGTATTGACACCGCAGTAATGACCTGGGTGGGGCATAGTCAAATTTCTGATGCTGGATAGTTTAATCCGCAGAGATTTTGTACTTGGCGATTGCTACACGATGTGTAGTAAATGATGAATATTCATAATCACCTTTCTGTGCCGATGGCATAGGGGGACCAATACCTCTGTTCGATGAACTAAGCTGGGA
>unexpected-IGHV-TRGJ
ATCTGCAAATGAACAGCCTGAGAGCCGAGGACACGGCTGTGTATTACTGTGCGAGAG
CGATCCCCCGGTATTACTATGATACTAGTGGCCCAAAC
atagtagtgattggatcaagacgtttgcaaaagggactaggctcatagtaacttcgcctg
\ No newline at end of file
algo/tests/repseq_vdj.py
View file @
8cfdc528
...
...
@@ -267,9 +267,15 @@ def should_results_from_vidjil_output(f_log):
if
l
[
0
]
==
'>'
:
l
=
l
.
strip
()
pos
=
l
.
find
(
' + '
)
if
' + '
in
l
else
l
.
find
(
' - '
)
if
pos
==
-
1
:
pos
=
l
.
find
(
' ! '
)
if
pos
==
-
1
:
raise
ValueError
(
"No [+-!] in the line: {}"
.
format
(
l
))
should
=
l
[
1
:
pos
].
replace
(
'_'
,
' '
)
pos
=
l
.
find
(
'
\t
'
)
if
pos
==
-
1
:
raise
ValueError
(
"I expected a tabulation to separate the sequence name from the remainder"
)
result
=
l
[
pos
+
1
:]
+
' '
yield
(
should
,
result
)
...
...
algo/tests/should-get-tests/tabs-in-output.should-get
0 → 100644
View file @
8cfdc528
!LAUNCH: $VIDJIL_DIR/$EXEC $VIDJIL_DEFAULT_OPTIONS -2 -c designations -g $VIDJIL_DIR/germline $VIDJIL_DATA/segment-or-not.fa
$ Check that output has one tab for each sequence
3:^>.*\t
\ No newline at end of file
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