ajout de la licence et commentaire de version sur chaque fichier .vhd

TRAITOR_UART.srcs/sim_1/new/config_manager_tb.vhd

 ----------------------------------------------------------------------------------
--- Company: 
--- Engineer: 
--- 
--- Create Date: 25.03.2020 10:08:11
--- Design Name: 
--- Module Name: traitor_tb - Behavioral
--- Project Name: 
--- Target Devices: 
--- Tool Versions: 
--- Description: 
--- 
--- Dependencies: 
+
+--{{ TRAITOR }}
+--Copyright (C) {{ 2021 }}  {{ INRIA }}
+
+--This program is free software: you can redistribute it and/or modify
+--it under the terms of the GNU Affero General Public License as published by
+--the Free Software Foundation, either version 3 of the License, or
+--(at your option) any later version.
+
+--This program is distributed in the hope that it will be useful,
+--but WITHOUT ANY WARRANTY; without even the implied warranty of
+--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--GNU Affero General Public License for more details.
+
+--You should have received a copy of the GNU Affero General Public License
+--along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+-- Engineer: R. Lashermes
+-- Target Devices: ArtiX7
+-- Description: Testbench for configuration_manager
+
 -- 
 -- Revision:
 -- Revision 0.01 - File Created
 -- Additional Comments:
--- 
-----------------------------------------------------------------------------------
 
+----------------------------------------------------------------------------------
 
 library IEEE;
 use IEEE.STD_LOGIC_1164.ALL;

TRAITOR_UART.srcs/sim_1/new/traitor_tb.vhd

 ----------------------------------------------------------------------------------
--- Company: 
--- Engineer: 
--- 
--- Create Date: 25.03.2020 10:08:11
--- Design Name: 
--- Module Name: traitor_tb - Behavioral
--- Project Name: 
--- Target Devices: 
--- Tool Versions: 
--- Description: 
--- 
--- Dependencies: 
+
+--{{ TRAITOR }}
+--Copyright (C) {{ 2021 }}  {{ INRIA }}
+
+--This program is free software: you can redistribute it and/or modify
+--it under the terms of the GNU Affero General Public License as published by
+--the Free Software Foundation, either version 3 of the License, or
+--(at your option) any later version.
+
+--This program is distributed in the hope that it will be useful,
+--but WITHOUT ANY WARRANTY; without even the implied warranty of
+--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--GNU Affero General Public License for more details.
+
+--You should have received a copy of the GNU Affero General Public License
+--along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+-- Engineer: L. Claudepierre
+-- Target Devices: ArtiX7
+-- Description: Test-bench for TRAITOR 
+
 -- 
 -- Revision:
 -- Revision 0.01 - File Created
 -- Additional Comments:
--- 
-----------------------------------------------------------------------------------
 
+----------------------------------------------------------------------------------
 
 library IEEE;
 use IEEE.STD_LOGIC_1164.ALL;

TRAITOR_UART.srcs/sources_1/PLL_clk_PbMUX.vhd

 ----------------------------------------------------------------------------------
--- Company: INRIA
--- Engineer: Ludovic Claudepierre
--- 
--- Create Date: 19.11.2018 16:33:09
--- Design Name: 
--- Module Name: PLL_clk - Behavioral
--- Project Name: TRAITOR
+
+--{{ TRAITOR }}
+--Copyright (C) {{ 2021 }}  {{ INRIA }}
+
+--This program is free software: you can redistribute it and/or modify
+--it under the terms of the GNU Affero General Public License as published by
+--the Free Software Foundation, either version 3 of the License, or
+--(at your option) any later version.
+
+--This program is distributed in the hope that it will be useful,
+--but WITHOUT ANY WARRANTY; without even the implied warranty of
+--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--GNU Affero General Public License for more details.
+
+--You should have received a copy of the GNU Affero General Public License
+--along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+-- Engineer: L. Claudepierre
 -- Target Devices: ArtiX7
--- Tool Versions: v1
--- Description: 
--- 
--- Dependencies: 
+-- Description:  Glitch generation. Parameterization of the MMCM phase difference according to the "amplitude" parameter at the address x00 (1 byte value).
+-- Generation of the clk_glitch = clk1 xor clk2, and then generation of clk_out switching between clk1 and clk_glitch according to the burst parameters
+-- Burst parameters are located into the memory.
 -- 
 -- Revision:
 -- Revision 0.01 - File Created
 -- Additional Comments:
--- 
-----------------------------------------------------------------------------------
 
+----------------------------------------------------------------------------------
 
 library IEEE;
 use IEEE.STD_LOGIC_1164.ALL;

TRAITOR_UART.srcs/sources_1/baud_gen.vhd

+----------------------------------------------------------------------------------
+
+--{{ TRAITOR }}
+--Copyright (C) {{ 2021 }}  {{ INRIA }}
+
+--This program is free software: you can redistribute it and/or modify
+--it under the terms of the GNU Affero General Public License as published by
+--the Free Software Foundation, either version 3 of the License, or
+--(at your option) any later version.
+
+--This program is distributed in the hope that it will be useful,
+--but WITHOUT ANY WARRANTY; without even the implied warranty of
+--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--GNU Affero General Public License for more details.
+
+--You should have received a copy of the GNU Affero General Public License
+--along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+-- Engineer: R. Lashermes
+-- Target Devices: ArtiX7
+-- Description: 
+
+-- 
+-- Revision:
+-- Revision 0.01 - File Created
+-- Additional Comments:
+
+----------------------------------------------------------------------------------
 library IEEE;
 use IEEE.std_logic_1164.all;
 use IEEE.numeric_std.all;

TRAITOR_UART.srcs/sources_1/common.vhd

+----------------------------------------------------------------------------------
+
+--{{ TRAITOR }}
+--Copyright (C) {{ 2021 }}  {{ INRIA }}
+
+--This program is free software: you can redistribute it and/or modify
+--it under the terms of the GNU Affero General Public License as published by
+--the Free Software Foundation, either version 3 of the License, or
+--(at your option) any later version.
+
+--This program is distributed in the hope that it will be useful,
+--but WITHOUT ANY WARRANTY; without even the implied warranty of
+--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--GNU Affero General Public License for more details.
+
+--You should have received a copy of the GNU Affero General Public License
+--along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+-- Engineer: R. Lashermes
+-- Target Devices: ArtiX7
+-- Description: Constant and global data
+
+-- 
+-- Revision:
+-- Revision 0.01 - File Created
+-- Additional Comments:
+
+----------------------------------------------------------------------------------
 library IEEE;
 use IEEE.std_logic_1164.all;
 use IEEE.numeric_std.all;

TRAITOR_UART.srcs/sources_1/configuration_manager.vhd

+----------------------------------------------------------------------------------
+
+--{{ TRAITOR }}
+--Copyright (C) {{ 2021 }}  {{ INRIA }}
+
+--This program is free software: you can redistribute it and/or modify
+--it under the terms of the GNU Affero General Public License as published by
+--the Free Software Foundation, either version 3 of the License, or
+--(at your option) any later version.
+
+--This program is distributed in the hope that it will be useful,
+--but WITHOUT ANY WARRANTY; without even the implied warranty of
+--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--GNU Affero General Public License for more details.
+
+--You should have received a copy of the GNU Affero General Public License
+--along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+-- Engineer: R. Lashermes & L. Claudepierre
+-- Target Devices: ArtiX7
+-- Description:  Interface UART to read memory and send the results to the Host
+
+-- 
+-- Revision:
+-- Revision 0.01 - File Created
+-- Additional Comments:
+
+----------------------------------------------------------------------------------
 library IEEE;
 use IEEE.std_logic_1164.all;
 use IEEE.numeric_std.all;

TRAITOR_UART.srcs/sources_1/fifo_autoreader.vhd

+----------------------------------------------------------------------------------
+
+--{{ TRAITOR }}
+--Copyright (C) {{ 2021 }}  {{ INRIA }}
+
+--This program is free software: you can redistribute it and/or modify
+--it under the terms of the GNU Affero General Public License as published by
+--the Free Software Foundation, either version 3 of the License, or
+--(at your option) any later version.
+
+--This program is distributed in the hope that it will be useful,
+--but WITHOUT ANY WARRANTY; without even the implied warranty of
+--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--GNU Affero General Public License for more details.
+
+--You should have received a copy of the GNU Affero General Public License
+--along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+-- Engineer: R. Lashermes
+-- Target Devices: ArtiX7
+-- Description:  Fifo autoreader
+
+-- 
+-- Revision:
+-- Revision 0.01 - File Created
+-- Additional Comments:
+
+----------------------------------------------------------------------------------
 library IEEE;
 use IEEE.std_logic_1164.all;
 

TRAITOR_UART.srcs/sources_1/pulser.vhd

+----------------------------------------------------------------------------------
+
+--{{ TRAITOR }}
+--Copyright (C) {{ 2021 }}  {{ INRIA }}
+
+--This program is free software: you can redistribute it and/or modify
+--it under the terms of the GNU Affero General Public License as published by
+--the Free Software Foundation, either version 3 of the License, or
+--(at your option) any later version.
+
+--This program is distributed in the hope that it will be useful,
+--but WITHOUT ANY WARRANTY; without even the implied warranty of
+--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--GNU Affero General Public License for more details.
+
+--You should have received a copy of the GNU Affero General Public License
+--along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+-- Engineer: R. Lashermes
+-- Target Devices: ArtiX7
+-- Description:  pulse generation for the autoreader
+
+-- 
+-- Revision:
+-- Revision 0.01 - File Created
+-- Additional Comments:
+
+----------------------------------------------------------------------------------
+
 library IEEE;
 use IEEE.std_logic_1164.all;
 

TRAITOR_UART.srcs/sources_1/triggy_common.vhd

+----------------------------------------------------------------------------------
+
+--{{ TRAITOR }}
+--Copyright (C) {{ 2021 }}  {{ INRIA }}
+
+--This program is free software: you can redistribute it and/or modify
+--it under the terms of the GNU Affero General Public License as published by
+--the Free Software Foundation, either version 3 of the License, or
+--(at your option) any later version.
+
+--This program is distributed in the hope that it will be useful,
+--but WITHOUT ANY WARRANTY; without even the implied warranty of
+--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--GNU Affero General Public License for more details.
+
+--You should have received a copy of the GNU Affero General Public License
+--along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+-- Engineer: R. Lashermes
+-- Target Devices: ArtiX7
+-- Description: constant and data for the glitch and memorisation
+
+-- 
+-- Revision:
+-- Revision 0.01 - File Created
+-- Additional Comments:
+
+----------------------------------------------------------------------------------
 library IEEE;
 use IEEE.std_logic_1164.all;
 use IEEE.numeric_std.all;

TRAITOR_UART.srcs/sources_1/triggy_glitch.vhd

 ----------------------------------------------------------------------------------
--- Company: 
--- Engineer: 
--- 
--- Create Date: 18.03.2019 13:57:46
--- Design Name: 
--- Module Name: triggy_glitch - Behavioral
--- Project Name: 
--- Target Devices: 
--- Tool Versions: 
--- Description: 
--- 
--- Dependencies: 
+
+--{{ TRAITOR }}
+--Copyright (C) {{ 2021 }}  {{ INRIA }}
+
+--This program is free software: you can redistribute it and/or modify
+--it under the terms of the GNU Affero General Public License as published by
+--the Free Software Foundation, either version 3 of the License, or
+--(at your option) any later version.
+
+--This program is distributed in the hope that it will be useful,
+--but WITHOUT ANY WARRANTY; without even the implied warranty of
+--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--GNU Affero General Public License for more details.
+
+--You should have received a copy of the GNU Affero General Public License
+--along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+-- Engineer: L. Claudepierre
+-- Target Devices: ArtiX7
+-- Description:  Wrapper of Glitch generation and Memory/UART communication
+
 -- 
 -- Revision:
 -- Revision 0.01 - File Created
 -- Additional Comments:
--- 
+
 ----------------------------------------------------------------------------------
 
 library IEEE;

TRAITOR_UART.srcs/sources_1/triggy_top.vhd

+----------------------------------------------------------------------------------
+
+--{{ TRAITOR }}
+--Copyright (C) {{ 2021 }}  {{ INRIA }}
+
+--This program is free software: you can redistribute it and/or modify
+--it under the terms of the GNU Affero General Public License as published by
+--the Free Software Foundation, either version 3 of the License, or
+--(at your option) any later version.
+
+--This program is distributed in the hope that it will be useful,
+--but WITHOUT ANY WARRANTY; without even the implied warranty of
+--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--GNU Affero General Public License for more details.
+
+--You should have received a copy of the GNU Affero General Public License
+--along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+-- Engineer: R. Lashermes & L.Claudepierre
+-- Target Devices: ArtiX7
+-- Description:  Wrapper of Memory and UART communication
+
+-- 
+-- Revision:
+-- Revision 0.01 - File Created
+-- Additional Comments:
+
+----------------------------------------------------------------------------------
+
+
 library IEEE;
 use IEEE.std_logic_1164.all;
 use IEEE.numeric_std.all;

TRAITOR_UART.srcs/sources_1/uart.vhd

+----------------------------------------------------------------------------------
+
+--{{ TRAITOR }}
+--Copyright (C) {{ 2021 }}  {{ INRIA }}
+
+--This program is free software: you can redistribute it and/or modify
+--it under the terms of the GNU Affero General Public License as published by
+--the Free Software Foundation, either version 3 of the License, or
+--(at your option) any later version.
+
+--This program is distributed in the hope that it will be useful,
+--but WITHOUT ANY WARRANTY; without even the implied warranty of
+--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--GNU Affero General Public License for more details.
+
+--You should have received a copy of the GNU Affero General Public License
+--along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+-- Engineer: R. Lashermes
+-- Target Devices: ArtiX7
+-- Description:  communication with UART interface
+
+-- 
+-- Revision:
+-- Revision 0.01 - File Created
+-- Additional Comments:
+
+----------------------------------------------------------------------------------
 library IEEE;
 use IEEE.std_logic_1164.all;
 use IEEE.numeric_std.all;

TRAITOR_UART.srcs/sources_1/uart_ctrl_pkg.vhd

----------------------------------------------------------------------------
--- UART Control Package
--- Author       : Josh Chong
--- Date         : November 12, 1999
--- File Name    : uart_ctrl_pkg.vhd
--- Description  : Package of all components used by uart_ctrl.vhd
----------------------------------------------------------------------------
-
-library ieee;
-use ieee.std_logic_1164.all;
-
-package uart_ctrl_pkg is
-   component txmit is
-   PORT (
-      mclkx16: IN std_logic;
-      write  : IN std_logic;
-      reset  : IN std_logic;
-      data   : IN std_logic_vector(7 downto 0);
-      tx     : OUT std_logic;
-      txrdy  : OUT std_logic);
-   end component;
-
-   component rxcver is 
-   PORT (
-      mclkx16   : IN std_logic;
-      read      : IN std_logic;
-      rx        : IN std_logic;
-      reset     : IN std_logic;
-      rxrdy     : OUT std_logic;
-      parityerr : OUT std_logic;
-      framingerr: OUT std_logic;
-      overrun   : OUT std_logic;
-      data      : OUT std_logic_vector(7 downto 0));
-   end component;
-
--- An 16x8-bit FIFO from Altera's MegaWizard Plug-In Manager
-   component fifo is
-   port (
-      data  : IN STD_LOGIC_VECTOR (7 DOWNTO 0);
-      wrreq : IN STD_LOGIC;
-      rdreq : IN STD_LOGIC;
-      clock : IN STD_LOGIC;
-      sclr  : IN STD_LOGIC;
-	  q     : OUT STD_LOGIC_VECTOR (7 DOWNTO 0);
-      full  : OUT STD_LOGIC;
-      empty : OUT STD_LOGIC;
-      usedw : OUT STD_LOGIC_VECTOR (3 DOWNTO 0) );
-   end component;
-
-end package;

TRAITOR_UART.srcs/sources_1/uart_rx.vhd

+----------------------------------------------------------------------------------
+
+--{{ TRAITOR }}
+--Copyright (C) {{ 2021 }}  {{ INRIA }}
+
+--This program is free software: you can redistribute it and/or modify
+--it under the terms of the GNU Affero General Public License as published by
+--the Free Software Foundation, either version 3 of the License, or
+--(at your option) any later version.
+
+--This program is distributed in the hope that it will be useful,
+--but WITHOUT ANY WARRANTY; without even the implied warranty of
+--MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--GNU Affero General Public License for more details.
+
+--You should have received a copy of the GNU Affero General Public License
+--along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+
+-- Engineer: R. Lashermes
+-- Target Devices: ArtiX7
+-- Description: 
+
+-- 
+-- Revision:
+-- Revision 0.01 - File Created
+-- Additional Comments:
+
+----------------------------------------------------------------------------------
 library IEEE;
 use IEEE.std_logic_1164.all;
 use IEEE.numeric_std.all;

TRAITOR_UART.srcs/sources_1/uart_trig.vhd

-library IEEE;
-use IEEE.std_logic_1164.all;
-use IEEE.numeric_std.all;
-use work.triggy_common.all;
-use work.common.all;
-
-entity uart_trig is
-  port(clk:           in std_logic;
-       reset:         in std_logic;
-
-       conf:          in UartTrigConf;
-
-       data_en:       in std_logic;
-       data:          in byte;
-
-       trig_o:        out std_logic
-       );
-end uart_trig;
-
-architecture behavior of uart_trig is
-
-  component pulser is
-    port(clk_in:       in std_logic;
-         clk_out:       in std_logic;
-         reset:     in std_logic;
-         pulse_in:  in std_logic;
-         pulse_out: out std_logic
-         );
-  end component;
-
-  signal last_bytes: UartSequence;--memorize last bytes
-  signal matching_vector: std_logic_vector(SEQUENCE_SIZE-1 downto 0);
-  signal matching_and: std_logic_vector(SEQUENCE_SIZE-1 downto 0);
-  signal matching: std_logic;
-
-  begin
-
-    matching_and(SEQUENCE_SIZE-1) <= matching_vector(SEQUENCE_SIZE-1);
-
-    and_comp: for i in 0 to SEQUENCE_SIZE-2 generate
-      matching_and(i) <= matching_vector(i) and matching_and(i+1);
-    end generate;
-    matching <= matching_and(0);
-
-    fill_last_bytes: process(clk, reset)
-      begin
-        if reset = '1' then
-          last_bytes <= (others => (others => '0'));
-        elsif rising_edge(clk) then
-          if data_en = '1' then
-            for i in 1 to SEQUENCE_SIZE-1 loop
-              last_bytes(i-1) <= last_bytes(i);
-            end loop;
-            last_bytes(SEQUENCE_SIZE-1) <= data;
-          end if;
-        end if;
-    end process;
-
-    gen_vec: for i in 0 to SEQUENCE_SIZE-1 generate
-      matching_vector(i) <= '1' when (last_bytes(i) = conf.sequence(i)) or (i < (SEQUENCE_SIZE-conf.sequence_size)) else '0';
-    end generate;
-
-
-    trig_pulser: pulser
-      port map(
-        clk_in      => clk,
-        clk_out     => clk,
-        reset       => reset,
-        pulse_in    => matching,
-        pulse_out   => trig_o
-      );
-
-
-end behavior;