+ in between two TB executions the CPU check the interruption status -- https://github.com/qemu/qemu/blob/v4.2.0/accel/tcg/cpu-exec.c#L715
+ cpu interruption routine is deferred to a specific harware (e.g x86) -- https://github.com/qemu/qemu/blob/v4.2.0/target/i386/cpu.c#L7061
+ which filter the interruption source (e.g hardware) -- https://github.com/qemu/qemu/blob/v4.2.0/target/i386/seg_helper.c#L1357-L1365
+ finally look up on the Interruption Table Descriptor to find the (kernel) interruption handler to call -- 'https://github.com/qemu/qemu/blob/v4.2.0/target/i386/seg_helper.c#L872-L879'
+ finally look up on the Interruption Table Descriptor to find the (kernel) interruption handler to call -- [[https://github.com/qemu/qemu/blob/v4.2.0/target/i386/seg_helper.c#L872-L879]]
+ TODO: understand how/when the packet is actually read by the guest driver (when the interruption handler is called ?)
