Maj terminée. Pour consulter la release notes associée voici le lien :
https://about.gitlab.com/releases/2021/07/07/critical-security-release-gitlab-14-0-4-released/

Commit 0e0175e6 authored by THIBAULT Samuel's avatar THIBAULT Samuel
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......@@ -450,12 +450,14 @@ In <em>8th International Workshop on Parallel Matrix Algorithms and Applications
<strong>Scheduling Tasks over Multicore machines enhanced with Accelerators: a Runtime System's Perspective</strong><br/>
PhD thesis, Université Bordeaux 1, 351 cours de la Libération --- 33405 TALENCE cedex, December 2011<br/>
[<a href="http://tel.archives-ouvertes.fr/tel-00777154">WWW</a>]
[<a href="http://tel.archives-ouvertes.fr/tel-00777154/document">PDF</a>]
</li>
<li>
<a name="AugThiNamWac11CCPE"></a>Cédric Augonnet, Samuel Thibault, Raymond Namyst, and Pierre-André Wacrenier<br/>
<strong>StarPU: A Unified Platform for Task Scheduling on Heterogeneous Multicore Architectures</strong><br/>
<em>Concurrency and Computation: Practice and Experience, Special Issue: Euro-Par 2009</em>, 23:187-198, February 2011<br/>
[<a href="http://hal.inria.fr/inria-00550877">WWW</a>]
[<a href="http://hal.inria.fr/inria-00550877/document">PDF</a>]
[doi:<a href="http://dx.doi.org/10.1002/cpe.1631">10.1002/cpe.1631</a>]
</li>
<li>
......@@ -463,6 +465,7 @@ PhD thesis, Université Bordeaux 1, 351 cours de la Libération --- 33405 TALENC
<strong>StarPU: a Runtime System for Scheduling Tasks over Accelerator-Based Multicore Machines</strong><br/>
Technical Report 7240, INRIA, March 2010<br/>
[<a href="http://hal.inria.fr/inria-00467677">WWW</a>]
[<a href="http://hal.inria.fr/inria-00467677/document">PDF</a>]
</li>
<li>
<a name="Aug09Renpar19"></a>Cédric Augonnet<br/>
......@@ -470,6 +473,7 @@ Technical Report 7240, INRIA, March 2010<br/>
In <em>19èmes Rencontres Francophones du Parallélisme</em>, Toulouse / France, September 2009<br/>
Note: Best Paper Award<br/>
[<a href="http://hal.inria.fr/inria-00411581">WWW</a>]
[<a href="http://hal.inria.fr/inria-00411581/document">PDF</a>]
</li>
<li>
<a name="AugThiNamWac09Europar"></a>Cédric Augonnet, Samuel Thibault, Raymond Namyst, and Pierre-André Wacrenier<br/>
......@@ -477,6 +481,7 @@ Note: Best Paper Award<br/>
In <em>Proceedings of the 15th International Euro-Par Conference</em>, volume 5704 of <em>Lecture Notes in Computer Science</em>, Delft, The Netherlands, pages 863-874, August 2009<br/>
Springer<br/>
[<a href="http://hal.inria.fr/inria-00384363">WWW</a>]
[<a href="http://hal.inria.fr/inria-00384363/document">PDF</a>]
[doi:<a href="http://dx.doi.org/10.1007/978-3-642-03869-3_80">10.1007/978-3-642-03869-3_80</a>]
</li>
<li>
......@@ -486,6 +491,7 @@ In <em>Proceedings of the International Euro-Par Workshops 2008, HPPC'08</em>, v
Springer<br/>
<strong>ISBN:</strong> 978-3-642-00954-9<br/>
[<a href="http://hal.inria.fr/inria-00326917">WWW</a>]
[<a href="http://hal.inria.fr/inria-00326917/document">PDF</a>]
[doi:<a href="http://dx.doi.org/10.1007/978-3-642-00955-6_22">10.1007/978-3-642-00955-6_22</a>]
</li>
<li>
......@@ -503,18 +509,21 @@ Mémoire de DEA, Université Bordeaux 1, June 2008<br/>
<strong>Le problème de la composition parallèle : une approche supervisée</strong><br/>
In <em>21èmes Rencontres Francophones du Parallélisme (RenPar'21)</em>, Grenoble, France, January 2013<br/>
[<a href="http://hal.inria.fr/hal-00773610">WWW</a>]
[<a href="http://hal.inria.fr/hal-00773610/document">PDF</a>]
</li>
<li>
<a name="hugo:hal-00824514"></a>Andra Hugo, Abdou Guermouche, Raymond Namyst, and Pierre-André Wacrenier<br/>
<strong>Composing multiple StarPU applications over heterogeneous machines: a supervised approach</strong><br/>
In <em>Third International Workshop on Accelerators and Hybrid Exascale Systems</em>, Boston, USA, May 2013<br/>
[<a href="http://hal.inria.fr/hal-00824514">WWW</a>]
[<a href="http://hal.inria.fr/hal-00824514/document">PDF</a>]
</li>
<li>
<a name="AH11Master"></a>Andra Hugo<br/>
<strong>Composabilité de codes parallèles sur architectures hétérogènes</strong><br/>
Mémoire de Master, Université Bordeaux 1, June 2011<br/>
[<a href="http://hal.inria.fr/inria-00619654/en/">WWW</a>]
[<a href="http://hal.inria.fr/inria-00619654/document">PDF</a>]
</li>
</ol>
<h4>On Scheduling</h4>
......@@ -561,6 +570,7 @@ Note: Working paper or preprint, October 2016<br/>
<strong>Bridging the Gap between Performance and Bounds of Cholesky Factorization on Heterogeneous Platforms</strong><br/>
In <em>Heterogeneity in Computing Workshop 2015</em>, Hyderabad, India, May 2015<br/>
[<a href="https://hal.inria.fr/hal-01120507">WWW</a>]
[<a href="https://hal.inria.fr/hal-01120507/document">PDF</a>]
</li>
<li>
<a name="sergent:hal-00978364"></a>Marc Sergent and Simon Archipoff<br/>
......@@ -605,6 +615,7 @@ Research Report RR-8953, Inria, March 2016<br/>
In <em>10th International Workshop on OpenMP, IWOMP2014</em>, 10th International Workshop on OpenMP, IWOMP2014, Salvador, Brazil, France, pages 16 - 29, September 2014<br/>
Springer<br/>
[<a href="https://hal.inria.fr/hal-01081974">WWW</a>]
[<a href="https://hal.inria.fr/hal-01081974/document">PDF</a>]
[doi:<a href="http://dx.doi.org/10.1007/978-3-319-11454-5_2">10.1007/978-3-319-11454-5_2</a>]
</li>
</ol>
......@@ -632,6 +643,7 @@ In Siegfried Benkner Jesper Larsson Träff and Jack Dongarra, editors, <em>EuroM
Springer<br/>
Note: Poster Session<br/>
[<a href="http://hal.inria.fr/hal-00725477">WWW</a>]
[<a href="http://hal.inria.fr/hal-00725477/document">PDF</a>]
</li>
</ol>
<h4>On Memory Control</h4>
......@@ -660,6 +672,7 @@ Research Report RR-8927, Inria Bordeaux Sud-Ouest ; Bordeaux INP ; CNRS ; Univer
<strong>Data-Aware Task Scheduling on Multi-Accelerator based Platforms</strong><br/>
In <em>The 16th International Conference on Parallel and Distributed Systems (ICPADS)</em>, Shanghai, China, December 2010<br/>
[<a href="http://hal.inria.fr/inria-00523937">WWW</a>]
[<a href="http://hal.inria.fr/inria-00523937/document">PDF</a>]
[doi:<a href="http://dx.doi.org/10.1109/ICPADS.2010.129">10.1109/ICPADS.2010.129</a>]
</li>
</ol>
......@@ -672,6 +685,7 @@ In <em>The 16th International Conference on Parallel and Distributed Systems (IC
In <em>Proceedings of the International Euro-Par Workshops 2009, HPPC'09</em>, volume 6043 of <em>Lecture Notes in Computer Science</em>, Delft, The Netherlands, pages 56-65, August 2009<br/>
Springer<br/>
[<a href="http://hal.inria.fr/inria-00421333">WWW</a>]
[<a href="http://hal.inria.fr/inria-00421333/document">PDF</a>]
[doi:<a href="http://dx.doi.org/10.1007/978-3-642-14122-5_9">10.1007/978-3-642-14122-5_9</a>]
</li>
</ol>
......@@ -703,6 +717,7 @@ Springer-Verlag<br/>
<strong>Exploiting the Cell/BE architecture with the StarPU unified runtime system</strong><br/>
In <em>SAMOS Workshop - International Workshop on Systems, Architectures, Modeling, and Simulation</em>, volume 5657 of <em>Lecture Notes in Computer Science</em>, Samos, Greece, July 2009<br/>
[<a href="http://hal.inria.fr/inria-00378705">WWW</a>]
[<a href="http://hal.inria.fr/inria-00378705/document">PDF</a>]
[doi:<a href="http://dx.doi.org/10.1007/978-3-642-03138-0_36">10.1007/978-3-642-03138-0_36</a>]
</li>
</ol>
......@@ -787,12 +802,15 @@ SIAM Conference on Parallel Processing for Scientific Computing, February 2014<b
<a name="Bor13Thesis"></a>Cyril Bordage<br/>
<strong>Ordonnancement dynamique, adapté aux architectures hétérogènes, de la méthode multipôle pour les équations de Maxwell, en électromagnétisme</strong><br/>
PhD thesis, Université Bordeaux 1, 351 cours de la Libération --- 33405 TALENCE cedex, December 2013<br/>
[<a href="https://tel.archives-ouvertes.fr/tel-00958494">WWW</a>]
[<a href="https://tel.archives-ouvertes.fr/tel-00958494/document">PDF</a>]
</li>
<li>
<a name="Hen13Thesis"></a>Sylvain Henry<br/>
<strong>Modèles de programmation et supports exécutifs pour architectures hétérogènes</strong><br/>
PhD thesis, Université Bordeaux 1, 351 cours de la Libération --- 33405 TALENCE cedex, November 2013<br/>
[<a href="http://tel.archives-ouvertes.fr/tel-00948309">WWW</a>]
[<a href="http://tel.archives-ouvertes.fr/tel-00948309/document">PDF</a>]
</li>
<li>
<a name="hen13fhpc"></a>Sylvain Henry<br/>
......@@ -820,6 +838,7 @@ SIAM<br/>
<strong>Optimisation du produit matrice-vecteur creux sur architecture GPU pour un simulateur de reservoir</strong><br/>
In <em>21èmes Rencontres Francophones du Parallélisme (RenPar'21)</em>, Grenoble, France, January 2013<br/>
[<a href="http://hal.inria.fr/hal-00773571">WWW</a>]
[<a href="http://hal.inria.fr/hal-00773571/document">PDF</a>]
</li>
<li>
<a name="rossignon:hal-00858350"></a>Corentin Rossignon, Pascal Hénon, Olivier Aumage, and Samuel Thibault<br/>
......@@ -833,6 +852,7 @@ In <em>PDSEC - 14th IEEE International Workshop on Parallel and Distributed Scie
<strong>Programmation unifiée multi-accélérateur OpenCL</strong><br/>
<em>Techniques et Sciences Informatiques</em>, (8-9-10):1233-1249, 2012<br/>
[<a href="http://hal.inria.fr/hal-00772742">WWW</a>]
[<a href="http://hal.inria.fr/hal-00772742/document">PDF</a>]
</li>
<li>
<a name="MahManAugThi12TSI"></a>Sidi Ahmed Mahmoudi, Pierre Manneback, Cédric Augonnet, and Samuel Thibault<br/>
......@@ -860,6 +880,7 @@ In <em>Design, Automation and Test in Europe (DATE)</em>, Dresden, Allemagne, Ma
<em>IEEE Micro</em>, 31(5):28-41, September 2011<br/>
<strong>ISSN:</strong> 0272-1732<br/>
[<a href="http://hal.inria.fr/hal-00648480">WWW</a>]
[<a href="http://hal.inria.fr/hal-00648480/document">PDF</a>]
[doi:<a href="http://dx.doi.org/10.1109/MM.2011.67">10.1109/MM.2011.67</a>]
</li>
<li>
......@@ -867,12 +888,14 @@ In <em>Design, Automation and Test in Europe (DATE)</em>, Dresden, Allemagne, Ma
<strong>LU factorization for accelerator-based systems</strong><br/>
In <em>9th ACS/IEEE International Conference on Computer Systems and Applications (AICCSA 11)</em>, Sharm El-Sheikh, Egypt, June 2011<br/>
[<a href="http://hal.inria.fr/hal-00654193">WWW</a>]
[<a href="http://hal.inria.fr/hal-00654193/document">PDF</a>]
</li>
<li>
<a name="AguAugDonFavLtaThiTom11IPDPS"></a>Emmanuel Agullo, Cédric Augonnet, Jack Dongarra, Mathieu Faverge, Hatem Ltaief, Samuel Thibault, and Stanimire Tomov<br/>
<strong>QR Factorization on a Multicore Node Enhanced with Multiple GPU Accelerators</strong><br/>
In <em>25th IEEE International Parallel & Distributed Processing Symposium (IEEE IPDPS 2011)</em>, Anchorage, Alaska, USA, May 2011<br/>
[<a href="http://hal.inria.fr/inria-00547614">WWW</a>]
[<a href="http://hal.inria.fr/inria-00547614/document">PDF</a>]
[doi:<a href="http://dx.doi.org/10.1109/IPDPS.2011.90">10.1109/IPDPS.2011.90</a>]
</li>
<li>
......@@ -880,12 +903,14 @@ In <em>25th IEEE International Parallel & Distributed Processing Symposium (IEEE
<strong>Flexible runtime support for efficient skeleton programming on hybrid systems</strong><br/>
In <em>Proceedings of the International Conference on Parallel Computing (ParCo), Applications, Tools and Techniques on the Road to Exascale Computing</em>, volume 22 of <em>Advances of Parallel Computing</em>, Gent, Belgium, pages 159-166, August 2011<br/>
[<a href="http://hal.inria.fr/inria-00606200/">WWW</a>]
[<a href="http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.699.6216&rep=rep1&type=pdf">PDF</a>]
</li>
<li>
<a name="Hen11Renpar"></a>Sylvain Henry<br/>
<strong>Programmation multi-accélérateurs unifiée en OpenCL</strong><br/>
In <em>20èmes Rencontres Francophones du Parallélisme (RenPar'20)</em>, Saint Malo, France, May 2011<br/>
[<a href="http://hal.archives-ouvertes.fr/hal-00643257">WWW</a>]
[<a href="http://hal.archives-ouvertes.fr/hal-00643257/document">PDF</a>]
</li>
<li>
<a name="MahManAugThi11Renpar20"></a>Sidi Ahmed Mahmoudi, Pierre Manneback, Cédric Augonnet, and Samuel Thibault<br/>
......@@ -899,12 +924,14 @@ In <em>20èmes Rencontres Francophones du Parallélisme</em>, Saint-Malo / Franc
In Wen-mei W. Hwu, editor, <em>GPU Computing Gems</em>, volume 2<br/>
Morgan Kaufmann, September 2010<br/>
[<a href="http://hal.inria.fr/inria-00547847">WWW</a>]
[<a href="http://hal.inria.fr/inria-00547847/document">PDF</a>]
</li>
<li>
<a name="AguAugDonLtaNamRomThiTom10SAAHPC"></a>Emmanuel Agullo, Cédric Augonnet, Jack Dongarra, Hatem Ltaief, Raymond Namyst, Jean Roman, Samuel Thibault, and Stanimire Tomov<br/>
<strong>Dynamically scheduled Cholesky factorization on multicore architectures with GPU accelerators</strong><br/>
In <em>Symposium on Application Accelerators in High Performance Computing (SAAHPC)</em>, Knoxville, USA, July 2010<br/>
[<a href="http://hal.inria.fr/inria-00547616">WWW</a>]
[<a href="http://hal.inria.fr/inria-00547616/document">PDF</a>]
</li>
</ol>
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