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Commit 71085618 authored by Davide Pala's avatar Davide Pala
Browse files

Change single bit slice var.slc<1>(n) with bit access var[n]

parent 3680a8ae
Pipeline #247256 passed with stages
in 19 minutes and 2 seconds
...@@ -305,7 +305,7 @@ void execute(const struct DCtoEx dctoEx, struct ExtoMem& extoMem) ...@@ -305,7 +305,7 @@ void execute(const struct DCtoEx dctoEx, struct ExtoMem& extoMem)
extoMem.result = dctoEx.lhs << (ac_int<5, false>)dctoEx.rhs; extoMem.result = dctoEx.lhs << (ac_int<5, false>)dctoEx.rhs;
break; break;
case RISCV_OPI_SRI: case RISCV_OPI_SRI:
if (dctoEx.funct7.slc<1>(5)) // SRAI if (dctoEx.funct7[5]) // SRAI
extoMem.result = dctoEx.lhs >> shamt; extoMem.result = dctoEx.lhs >> shamt;
else // SRLI else // SRLI
extoMem.result = (ac_int<32, false>)dctoEx.lhs >> shamt; extoMem.result = (ac_int<32, false>)dctoEx.lhs >> shamt;
...@@ -313,13 +313,13 @@ void execute(const struct DCtoEx dctoEx, struct ExtoMem& extoMem) ...@@ -313,13 +313,13 @@ void execute(const struct DCtoEx dctoEx, struct ExtoMem& extoMem)
} }
break; break;
case RISCV_OP: case RISCV_OP:
if (dctoEx.funct7.slc<1>(0)) // M Extension if (dctoEx.funct7[0]) // M Extension
{ {
} else { } else {
switch (dctoEx.funct3) { switch (dctoEx.funct3) {
case RISCV_OP_ADD: case RISCV_OP_ADD:
if (dctoEx.funct7.slc<1>(5)) // SUB if (dctoEx.funct7[5]) // SUB
extoMem.result = dctoEx.lhs - dctoEx.rhs; extoMem.result = dctoEx.lhs - dctoEx.rhs;
else // ADD else // ADD
extoMem.result = dctoEx.lhs + dctoEx.rhs; extoMem.result = dctoEx.lhs + dctoEx.rhs;
...@@ -337,7 +337,7 @@ void execute(const struct DCtoEx dctoEx, struct ExtoMem& extoMem) ...@@ -337,7 +337,7 @@ void execute(const struct DCtoEx dctoEx, struct ExtoMem& extoMem)
extoMem.result = dctoEx.lhs ^ dctoEx.rhs; extoMem.result = dctoEx.lhs ^ dctoEx.rhs;
break; break;
case RISCV_OP_SR: case RISCV_OP_SR:
if (dctoEx.funct7.slc<1>(5)) // SRA if (dctoEx.funct7[5]) // SRA
extoMem.result = dctoEx.lhs >> (ac_int<5, false>)dctoEx.rhs; extoMem.result = dctoEx.lhs >> (ac_int<5, false>)dctoEx.rhs;
else // SRL else // SRL
extoMem.result = (ac_int<32, false>)dctoEx.lhs >> (ac_int<5, false>)dctoEx.rhs; extoMem.result = (ac_int<32, false>)dctoEx.lhs >> (ac_int<5, false>)dctoEx.rhs;
......
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