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Commit 4f282c94 authored by Davide Pala's avatar Davide Pala

Removed unused copyReg (eg. copyFtoDC) functions

parent 0349a747
Pipeline #167581 passed with stages
in 6 minutes and 6 seconds
......@@ -52,12 +52,6 @@ struct Core {
// modelsim
};
// Functions for copying values
void copyFtoDC(struct FtoDC& dest, struct FtoDC src);
void copyDCtoEx(struct DCtoEx& dest, struct DCtoEx src);
void copyExtoMem(struct ExtoMem& dest, struct ExtoMem src);
void copyMemtoWB(struct MemtoWB& dest, struct MemtoWB src);
void doCycle(struct Core& core, bool globalStall);
#endif // __CORE_H__
......@@ -507,84 +507,6 @@ void forwardUnit(ac_int<5, false> decodeRs1, bool decodeUseRs1, ac_int<5, false>
}
}
/****************************************************************
* Copy functions
****************************************************************
void copyFtoDC(struct FtoDC &dest, struct FtoDC src){
dest.pc = src.pc;
dest.instruction = src.instruction;
dest.nextPCFetch = src.nextPCFetch;
dest.we = src.we;
}
void copyDCtoEx(struct DCtoEx &dest, struct DCtoEx src){
dest.pc = src.pc; // used for branch
dest.instruction = src.instruction;
dest.opCode = src.opCode; // opCode = instruction[6:0]
dest.funct7 = src.funct7; // funct7 = instruction[31:25]
dest.funct3 = src.funct3; // funct3 = instruction[14:12]
dest.lhs = src.lhs; // left hand side : operand 1
dest.rhs = src.rhs; // right hand side : operand 2
dest.datac = src.datac; // ST, BR, JAL/R,
//For branch unit
dest.nextPCDC = src.nextPCDC;
dest.isBranch = src.isBranch;
//Information for forward/stall unit
dest.useRs1 = src.useRs1;
dest.useRs2 = src.useRs2;
dest.useRs3 = src.useRs3;
dest.useRd = src.useRd;
dest.rs1 = src.rs1; // rs1 = instruction[19:15]
dest.rs2 = src.rs2; // rs2 = instruction[24:20]
dest.rs3 = src.rs3;
dest.rd = src.rd; // rd = instruction[11:7]
//Register for all stages
dest.we = src.we;
}
void copyExtoMem(struct ExtoMem &dest, struct ExtoMem src){
dest.pc = src.pc;
dest.instruction = src.instruction;
dest.result = src.result; // result of the EX stage
dest.rd = src.rd; // destination register
dest.useRd = src.useRd;
dest.isLongInstruction = src.isLongInstruction;
dest.opCode = src.opCode; // LD or ST (can be reduced to 2 bits)
dest.funct3 = src.funct3; // datasize and sign extension bit
dest.datac = src.datac; // data to be stored in memory or csr result
//For branch unit
dest.nextPC = src.nextPC;
dest.isBranch = src.isBranch;
//Register for all stages
dest.we = src.we;
}
void copyMemtoWB(struct MemtoWB &dest, struct MemtoWB src){
dest.result = src.result; // Result to be written back
dest.rd = src.rd; // destination register
dest.useRd = src.useRd;
dest.address = src.address;
dest.valueToWrite = src.valueToWrite;
dest.byteEnable = src.byteEnable;
dest.isStore = src.isStore;
dest.isLoad = src.isLoad;
//Register for all stages
dest.we = src.we;
}
*/
void doCycle(struct Core& core, // Core containing all values
bool globalStall)
{
......
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