Attention une mise à jour du serveur va être effectuée le lundi 17 mai entre 13h et 13h30. Cette mise à jour va générer une interruption du service de quelques minutes.

Commit 1d15e4f7 authored by Davide Pala's avatar Davide Pala

Changed headers to standard c++

- Moved DRAM_SIZE from core.h to basic_simulator.h
- changed c headers with c++ headers (stdio.h -> cstdio)
- use "" instead of <> for local includes
parent 12aa8167
#ifndef __BASIC_SIMULATOR_H__
#define __BASIC_SIMULATOR_H__
#include "simulator.h"
#include <vector>
#include "ac_int.h"
#include "simulator.h"
#define DRAM_SIZE ((size_t)1 << 26)
#define STACK_INIT (DRAM_SIZE - 0x1000)
class BasicSimulator : public Simulator {
unsigned heapAddress;
......
......@@ -8,9 +8,9 @@
#ifndef INCLUDE_CACHEMEMORY_H_
#define INCLUDE_CACHEMEMORY_H_
#include "ac_int.h"
#include "logarithm.h"
#include "memoryInterface.h"
#include <ac_int.h>
/************************************************************************
* Following values are templates:
......
#ifndef __CORE_H__
#define __CORE_H__
#include <ac_int.h>
#include <riscvISA.h>
#include "ac_int.h"
#include "riscvISA.h"
// all the possible memories
#include <cacheMemory.h>
#include <memoryInterface.h>
#include <pipelineRegisters.h>
#define DRAM_SIZE ((size_t)1 << 26)
#define STACK_INIT (DRAM_SIZE - 0x1000)
#include "cacheMemory.h"
#include "memoryInterface.h"
#include "pipelineRegisters.h"
#ifndef MEMORY_INTERFACE
#define MEMORY_INTERFACE SimpleMemory
......@@ -20,7 +17,7 @@
* Stall signals enum
* ****************************************************************************************
*/
typedef enum { STALL_FETCH = 0, STALL_DECODE = 1, STALL_EXECUTE = 2, STALL_MEMORY = 3, STALL_WRITEBACK = 4 } StallNames;
enum StallNames{ STALL_FETCH = 0, STALL_DECODE = 1, STALL_EXECUTE = 2, STALL_MEMORY = 3, STALL_WRITEBACK = 4 };
// This is ugly but otherwise with have a dependency : alu.h includes core.h
// (for pipeline regs) and core.h includes alu.h...
......
#ifndef __MEMORY_INTERFACE_H__
#define __MEMORY_INTERFACE_H__
#include <ac_int.h>
#include "ac_int.h"
typedef enum { BYTE = 0, HALF, WORD, BYTE_U, HALF_U, LONG } memMask;
......@@ -24,8 +24,7 @@ public:
IncompleteMemory(ac_int<32, false>* arg) { data = arg; }
void process(ac_int<32, false> addr, memMask mask, memOpType opType, ac_int<INTERFACE_SIZE * 8, false> dataIn,
ac_int<INTERFACE_SIZE * 8, false>& dataOut, bool& waitOut)
{
{
// Incomplete memory only works for 32 bits
assert(INTERFACE_SIZE == 4);
......
......@@ -7,9 +7,8 @@
*/
#ifndef INCLUDES_ISA_RISCVISA_H_
#define INCLUDES_ISA_RISCVISA_H_
#include <iomanip>
#include <sstream>
#include <string.h>
#include <string>
#ifndef __HLS__
std::string printDecodedInstrRISCV(unsigned int oneInstruction);
......
#include <errno.h>
#include <fcntl.h>
#include <stdio.h>
#include <stdlib.h>
#include <cstdio>
#include <cstdlib>
#include <cstring>
#include <sys/stat.h>
#include <sys/time.h>
......@@ -85,7 +86,6 @@ void BasicSimulator::readElf(const char *binaryFile){
if(DEBUG){
printf("Elf Reading done.\n");
}
}
void BasicSimulator::pushArgsOnStack(const std::vector<std::string> args){
......
#include <ac_int.h>
#include <cacheMemory.h>
#include <core.h>
#include "ac_int.h"
#include "cacheMemory.h"
#include "core.h"
#ifndef __HLS__
#include "simulator.h"
#endif // __HLS__
void fetch(ac_int<32, false> pc, struct FtoDC& ftoDC, ac_int<32, false> instruction)
{
......
#include <stdlib.h>
#include <string>
#include <vector>
......
#include <iomanip>
#include <sstream>
#include <string.h>
#include <string>
#include <riscvISA.h>
#include "riscvISA.h"
const char* riscvNamesOP[8] = {"ADD", "SLL", "CMPLT", "CMPLTU", "XOR", "", "OR", "AND"};
const char* riscvNamesOPI[8] = {"ADDi", "SLLi", "SLTi", "CMPLTUi", "XORi", "SRLi", "ORi", "ANDi"};
......
Markdown is supported
0% or .
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment