Skip to content
GitLab
Projects
Groups
Snippets
/
Help
Help
Support
Community forum
Keyboard shortcuts
?
Submit feedback
Contribute to GitLab
Sign in
Toggle navigation
Menu
Open sidebar
LASHERMES Ronan
Faustine
Commits
4d1be123
Commit
4d1be123
authored
Apr 11, 2022
by
LASHERMES Ronan
Browse files
starting Probe PCB
parent
a9cce569
Changes
5
Hide whitespace changes
Inline
Side-by-side
Code/Probe_PCB/probe_pcb/probe_pcb-cache.lib
0 → 100644
View file @
4d1be123
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
# Connector_Conn_Coaxial
#
DEF Connector_Conn_Coaxial J 0 40 Y N 1 F N
F0 "J" 10 120 50 H V C CNN
F1 "Connector_Conn_Coaxial" 115 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
*BNC*
*SMA*
*SMB*
*SMC*
*Cinch*
$ENDFPLIST
DRAW
A -2 0 71 1636 0 0 1 10 N -70 20 70 0
A -1 0 71 0 -1638 0 1 10 N 70 0 -70 -20
C 0 0 20 0 1 8 N
P 2 0 1 0 -100 0 -20 0 N
P 2 0 1 0 0 -100 0 -70 N
X In 1 -200 0 100 R 50 50 1 1 P
X Ext 2 0 -200 100 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_D_Zener
#
DEF Device_D_Zener D 0 40 N N 1 F N
F0 "D" 0 100 50 H V C CNN
F1 "Device_D_Zener" 0 -100 50 H V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
TO-???*
*_Diode_*
*SingleDiode*
D_*
$ENDFPLIST
DRAW
P 2 0 1 0 50 0 -50 0 N
P 3 0 1 8 -50 -50 -50 50 -30 50 N
P 4 0 1 8 50 -50 50 50 -50 0 50 -50 N
X K 1 -150 0 100 R 50 50 1 1 P
X A 2 150 0 100 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
# Device_L_Core_Ferrite
#
DEF Device_L_Core_Ferrite L 0 40 N N 1 F N
F0 "L" -50 0 50 V V C CNN
F1 "Device_L_Core_Ferrite" 110 0 50 V V C CNN
F2 "" 0 0 50 H I C CNN
F3 "" 0 0 50 H I C CNN
$FPLIST
Choke_*
*Coil*
Inductor_*
L_*
$ENDFPLIST
DRAW
A 0 -75 25 -899 899 0 1 0 N 0 -100 0 -50
A 0 -25 25 -899 899 0 1 0 N 0 -50 0 0
A 0 25 25 -899 899 0 1 0 N 0 0 0 50
A 0 75 25 -899 899 0 1 0 N 0 50 0 100
P 2 0 1 0 40 -110 40 -90 N
P 2 0 1 0 40 -70 40 -50 N
P 2 0 1 0 40 -30 40 -10 N
P 2 0 1 0 40 10 40 30 N
P 2 0 1 0 40 50 40 70 N
P 2 0 1 0 40 90 40 110 N
P 2 0 1 0 60 -90 60 -110 N
P 2 0 1 0 60 -50 60 -70 N
P 2 0 1 0 60 -10 60 -30 N
P 2 0 1 0 60 30 60 10 N
P 2 0 1 0 60 70 60 50 N
P 2 0 1 0 60 110 60 90 N
X 1 1 0 150 50 D 50 50 1 1 P
X 2 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
#End Library
Code/Probe_PCB/probe_pcb/probe_pcb.kicad_pcb
0 → 100644
View file @
4d1be123
(kicad_pcb (version 4) (host kicad "dummy file") )
Code/Probe_PCB/probe_pcb/probe_pcb.pro
0 → 100644
View file @
4d1be123
update
=
22
/
05
/
2015
07
:
44
:
53
version
=
1
last_client
=
kicad
[
general
]
version
=
1
RootSch
=
BoardNm
=
[
pcbnew
]
version
=
1
LastNetListRead
=
UseCmpFile
=
1
PadDrill
=
0.600000000000
PadDrillOvalY
=
0.600000000000
PadSizeH
=
1.500000000000
PadSizeV
=
1.500000000000
PcbTextSizeV
=
1.500000000000
PcbTextSizeH
=
1.500000000000
PcbTextThickness
=
0.300000000000
ModuleTextSizeV
=
1.000000000000
ModuleTextSizeH
=
1.000000000000
ModuleTextSizeThickness
=
0.150000000000
SolderMaskClearance
=
0.000000000000
SolderMaskMinWidth
=
0.000000000000
DrawSegmentWidth
=
0.200000000000
BoardOutlineThickness
=
0.100000000000
ModuleOutlineThickness
=
0.150000000000
[
cvpcb
]
version
=
1
NetIExt
=
net
[
eeschema
]
version
=
1
LibDir
=
[
eeschema
/
libraries
]
Code/Probe_PCB/probe_pcb/probe_pcb.sch
0 → 100644
View file @
4d1be123
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L Connector:Conn_Coaxial J1
U 1 1 62541A1E
P 3200 1350
F 0 "J1" H 3300 1325 50 0000 L CNN
F 1 "SMB" H 3300 1234 50 0000 L CNN
F 2 "" H 3200 1350 50 0001 C CNN
F 3 " ~" H 3200 1350 50 0001 C CNN
1 3200 1350
1 0 0 -1
$EndComp
$Comp
L Device:L_Core_Ferrite L1
U 1 1 625420D8
P 3050 2350
F 0 "L1" V 2869 2350 50 0000 C CNN
F 1 "EM probe" V 2960 2350 50 0000 C CNN
F 2 "" H 3050 2350 50 0001 C CNN
F 3 "~" H 3050 2350 50 0001 C CNN
1 3050 2350
0 1 1 0
$EndComp
$Comp
L Device:D_Zener D1
U 1 1 6254633D
P 3050 2000
F 0 "D1" H 3050 2216 50 0000 C CNN
F 1 "1.5KE600A" H 3050 2125 50 0000 C CNN
F 2 "" H 3050 2000 50 0001 C CNN
F 3 "~" H 3050 2000 50 0001 C CNN
1 3050 2000
1 0 0 -1
$EndComp
Wire Wire Line
3200 2000 3200 2350
Connection ~ 3200 2000
Wire Wire Line
2900 2350 2900 2000
Wire Wire Line
2900 2000 2900 1350
Wire Wire Line
2900 1350 3000 1350
Connection ~ 2900 2000
Wire Wire Line
3200 1550 3200 2000
$EndSCHEMATC
Code/Probe_PCB/probe_pcb/probe_pcb.sch-bak
0 → 100644
View file @
4d1be123
EESchema Schematic File Version 4
EELAYER 30 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
Sheet 1 1
Title ""
Date ""
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndDescr
$Comp
L Connector:Conn_Coaxial J1
U 1 1 62541A1E
P 3200 1350
F 0 "J1" H 3300 1325 50 0000 L CNN
F 1 "Conn_Coaxial" H 3300 1234 50 0000 L CNN
F 2 "" H 3200 1350 50 0001 C CNN
F 3 " ~" H 3200 1350 50 0001 C CNN
1 3200 1350
1 0 0 -1
$EndComp
$Comp
L Device:L_Core_Ferrite L1
U 1 1 625420D8
P 3050 2350
F 0 "L1" V 2869 2350 50 0000 C CNN
F 1 "L_Core_Ferrite" V 2960 2350 50 0000 C CNN
F 2 "" H 3050 2350 50 0001 C CNN
F 3 "~" H 3050 2350 50 0001 C CNN
1 3050 2350
0 1 1 0
$EndComp
$Comp
L Device:D_Zener D1
U 1 1 6254633D
P 3050 2000
F 0 "D1" H 3050 2216 50 0000 C CNN
F 1 "D_Zener" H 3050 2125 50 0000 C CNN
F 2 "" H 3050 2000 50 0001 C CNN
F 3 "~" H 3050 2000 50 0001 C CNN
1 3050 2000
1 0 0 -1
$EndComp
Wire Wire Line
3200 2000 3200 2350
Connection ~ 3200 2000
Wire Wire Line
2900 2350 2900 2000
Wire Wire Line
2900 2000 2900 1350
Wire Wire Line
2900 1350 3000 1350
Connection ~ 2900 2000
Wire Wire Line
3200 1550 3200 2000
$EndSCHEMATC
Write
Preview
Supports
Markdown
0%
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment