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VIGNET Pierre
cadbiom
Commits
5ed41c4f
Commit
5ed41c4f
authored
Feb 14, 2017
by
VIGNET Pierre
Browse files
Improve extract_act_input_clock_seq() with pythonic code + comprehension list
parent
ad2d9d68
Changes
1
Hide whitespace changes
Inline
Side-by-side
cadbiom/models/clause_constraints/mcl/MCLSolutions.py
View file @
5ed41c4f
...
...
@@ -241,20 +241,26 @@ class RawSolution(object):
def
extract_act_input_clock_seq
(
self
):
"""
Extract the sequence of activated __inputs and clocks in the solution sol
@return: list<list<int>> list of input vector
"""
len1
=
len
(
self
.
__unfolder
.
get_inputs
())
len2
=
len
(
self
.
__unfolder
.
get_free_clocks
())
if
len1
==
0
and
len2
==
0
:
return
[]
unflat
=
self
.
unflatten
()
ic_traj
=
[]
for
xic
in
unflat
:
xi_ic
=
self
.
extract_act_inputs_clocks
(
xic
)
ic_traj
.
append
(
xi_ic
)
return
ic_traj
@return: list<list<int>> list of input vector
"""
return
[]
\
if
(
len
(
self
.
__unfolder
.
get_inputs
())
==
0
)
and
(
len
(
self
.
__unfolder
.
get_free_clocks
())
==
0
)
\
else
[
self
.
extract_act_inputs_clocks
(
xic
)
for
xic
in
self
.
unflatten
()]
# list of lists
# len1 = len(self.__unfolder.get_inputs())
# len2 = len(self.__unfolder.get_free_clocks())
# if len1 == 0 and len2 == 0:
# return []
#
# unflat = self.unflatten()
# ic_traj = []
# for xic in unflat:
# xi_ic = self.extract_act_inputs_clocks(xic)
# ic_traj.append(xi_ic)
# return ic_traj
def
__str__
(
self
):
"""
For debug purpose
...
...
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