From e7edd126839309c4493d092765cab678b423c2ca Mon Sep 17 00:00:00 2001
From: Laurent Pouilloux <laurent.pouilloux@inria.fr>
Date: Thu, 10 Oct 2024 11:38:52 +0200
Subject: [PATCH] [all sites] update processor microcode
---
data/grid5000/accesses/refrepo.json | 164 +++++++++---------
.../clusters/servan/nodes/servan-1.json | 2 +-
.../clusters/servan/nodes/servan-2.json | 2 +-
.../clusters/troll/nodes/troll-1.json | 2 +-
.../clusters/troll/nodes/troll-2.json | 2 +-
.../clusters/troll/nodes/troll-3.json | 2 +-
.../clusters/troll/nodes/troll-4.json | 2 +-
.../lille/clusters/chirop/nodes/chirop-1.json | 2 +-
.../lille/clusters/chirop/nodes/chirop-2.json | 2 +-
.../lille/clusters/chirop/nodes/chirop-3.json | 2 +-
.../lille/clusters/chirop/nodes/chirop-4.json | 2 +-
.../lille/clusters/chirop/nodes/chirop-5.json | 2 +-
.../clusters/neowise/nodes/neowise-1.json | 2 +-
.../clusters/neowise/nodes/neowise-10.json | 2 +-
.../clusters/neowise/nodes/neowise-2.json | 2 +-
.../clusters/neowise/nodes/neowise-3.json | 2 +-
.../clusters/neowise/nodes/neowise-4.json | 2 +-
.../clusters/neowise/nodes/neowise-5.json | 2 +-
.../clusters/neowise/nodes/neowise-6.json | 2 +-
.../clusters/neowise/nodes/neowise-7.json | 2 +-
.../clusters/neowise/nodes/neowise-8.json | 2 +-
.../clusters/neowise/nodes/neowise-9.json | 2 +-
.../lyon/clusters/sirius/nodes/sirius-1.json | 2 +-
.../clusters/abacus12/nodes/abacus12-1.json | 2 +-
.../clusters/abacus16/nodes/abacus16-1.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-1.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-10.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-11.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-12.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-13.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-14.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-15.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-16.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-17.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-18.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-19.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-2.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-20.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-21.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-22.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-23.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-24.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-25.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-26.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-27.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-28.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-29.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-3.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-30.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-31.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-32.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-4.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-5.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-6.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-7.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-8.json | 2 +-
.../clusters/paradoxe/nodes/paradoxe-9.json | 2 +-
.../clusters/roazhon13/nodes/roazhon13-1.json | 2 +-
.../clusters/roazhon13/nodes/roazhon13-2.json | 2 +-
.../clusters/roazhon13/nodes/roazhon13-3.json | 2 +-
.../clusters/roazhon13/nodes/roazhon13-4.json | 2 +-
.../clusters/roazhon13/nodes/roazhon13-5.json | 2 +-
.../clusters/roazhon13/nodes/roazhon13-6.json | 2 +-
.../clusters/roazhon13/nodes/roazhon13-7.json | 2 +-
.../clusters/roazhon13/nodes/roazhon13-8.json | 2 +-
.../clusters/roazhon4/nodes/roazhon4-1.json | 2 +-
.../fleckenstein/nodes/fleckenstein-1.json | 2 +-
.../fleckenstein/nodes/fleckenstein-10.json | 2 +-
.../fleckenstein/nodes/fleckenstein-2.json | 2 +-
.../fleckenstein/nodes/fleckenstein-3.json | 2 +-
.../fleckenstein/nodes/fleckenstein-5.json | 2 +-
.../fleckenstein/nodes/fleckenstein-6.json | 2 +-
.../fleckenstein/nodes/fleckenstein-7.json | 2 +-
.../fleckenstein/nodes/fleckenstein-8.json | 2 +-
.../fleckenstein/nodes/fleckenstein-9.json | 2 +-
.../clusters/montcalm/nodes/montcalm-10.json | 2 +-
.../clusters/montcalm/nodes/montcalm-2.json | 2 +-
.../clusters/montcalm/nodes/montcalm-3.json | 2 +-
.../clusters/montcalm/nodes/montcalm-4.json | 2 +-
.../clusters/montcalm/nodes/montcalm-5.json | 2 +-
.../clusters/montcalm/nodes/montcalm-6.json | 2 +-
.../clusters/montcalm/nodes/montcalm-7.json | 2 +-
.../clusters/montcalm/nodes/montcalm-9.json | 2 +-
.../clusters/servan/nodes/servan-1.yaml | 2 +-
.../clusters/servan/nodes/servan-2.yaml | 2 +-
.../clusters/troll/nodes/troll-1.yaml | 2 +-
.../clusters/troll/nodes/troll-2.yaml | 2 +-
.../clusters/troll/nodes/troll-3.yaml | 2 +-
.../clusters/troll/nodes/troll-4.yaml | 2 +-
.../lille/clusters/chirop/nodes/chirop-1.yaml | 2 +-
.../lille/clusters/chirop/nodes/chirop-2.yaml | 2 +-
.../lille/clusters/chirop/nodes/chirop-3.yaml | 2 +-
.../lille/clusters/chirop/nodes/chirop-4.yaml | 2 +-
.../lille/clusters/chirop/nodes/chirop-5.yaml | 2 +-
.../clusters/neowise/nodes/neowise-1.yaml | 2 +-
.../clusters/neowise/nodes/neowise-10.yaml | 2 +-
.../clusters/neowise/nodes/neowise-2.yaml | 2 +-
.../clusters/neowise/nodes/neowise-3.yaml | 2 +-
.../clusters/neowise/nodes/neowise-4.yaml | 2 +-
.../clusters/neowise/nodes/neowise-5.yaml | 2 +-
.../clusters/neowise/nodes/neowise-6.yaml | 2 +-
.../clusters/neowise/nodes/neowise-7.yaml | 2 +-
.../clusters/neowise/nodes/neowise-8.yaml | 2 +-
.../clusters/neowise/nodes/neowise-9.yaml | 2 +-
.../lyon/clusters/sirius/nodes/sirius-1.yaml | 2 +-
.../clusters/abacus12/nodes/abacus12-1.yaml | 2 +-
.../clusters/abacus16/nodes/abacus16-1.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-1.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-10.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-11.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-12.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-13.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-14.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-15.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-16.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-17.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-18.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-19.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-2.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-20.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-21.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-22.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-23.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-24.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-25.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-26.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-27.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-28.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-29.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-3.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-30.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-31.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-32.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-4.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-5.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-6.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-7.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-8.yaml | 2 +-
.../clusters/paradoxe/nodes/paradoxe-9.yaml | 2 +-
.../clusters/roazhon13/nodes/roazhon13-1.yaml | 2 +-
.../clusters/roazhon13/nodes/roazhon13-2.yaml | 2 +-
.../clusters/roazhon13/nodes/roazhon13-3.yaml | 2 +-
.../clusters/roazhon13/nodes/roazhon13-4.yaml | 2 +-
.../clusters/roazhon13/nodes/roazhon13-5.yaml | 2 +-
.../clusters/roazhon13/nodes/roazhon13-6.yaml | 2 +-
.../clusters/roazhon13/nodes/roazhon13-7.yaml | 2 +-
.../clusters/roazhon13/nodes/roazhon13-8.yaml | 2 +-
.../clusters/roazhon4/nodes/roazhon4-1.yaml | 2 +-
.../fleckenstein/nodes/fleckenstein-1.yaml | 2 +-
.../fleckenstein/nodes/fleckenstein-10.yaml | 2 +-
.../fleckenstein/nodes/fleckenstein-2.yaml | 2 +-
.../fleckenstein/nodes/fleckenstein-3.yaml | 2 +-
.../fleckenstein/nodes/fleckenstein-5.yaml | 2 +-
.../fleckenstein/nodes/fleckenstein-6.yaml | 2 +-
.../fleckenstein/nodes/fleckenstein-7.yaml | 2 +-
.../fleckenstein/nodes/fleckenstein-8.yaml | 2 +-
.../fleckenstein/nodes/fleckenstein-9.yaml | 2 +-
.../clusters/montcalm/nodes/montcalm-10.yaml | 2 +-
.../clusters/montcalm/nodes/montcalm-2.yaml | 2 +-
.../clusters/montcalm/nodes/montcalm-3.yaml | 2 +-
.../clusters/montcalm/nodes/montcalm-4.yaml | 2 +-
.../clusters/montcalm/nodes/montcalm-5.yaml | 2 +-
.../clusters/montcalm/nodes/montcalm-6.yaml | 2 +-
.../clusters/montcalm/nodes/montcalm-7.yaml | 2 +-
.../clusters/montcalm/nodes/montcalm-9.yaml | 2 +-
165 files changed, 246 insertions(+), 246 deletions(-)
diff --git a/data/grid5000/accesses/refrepo.json b/data/grid5000/accesses/refrepo.json
index 22442075f58..ff7450cd673 100644
--- a/data/grid5000/accesses/refrepo.json
+++ b/data/grid5000/accesses/refrepo.json
@@ -12080,7 +12080,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7352 24-Core Processor",
"vendor": "AMD",
@@ -12307,7 +12307,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7352 24-Core Processor",
"vendor": "AMD",
@@ -12581,7 +12581,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5218 CPU @ 2.30GHz",
"vendor": "Intel",
@@ -12845,7 +12845,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5218 CPU @ 2.30GHz",
"vendor": "Intel",
@@ -13109,7 +13109,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5218 CPU @ 2.30GHz",
"vendor": "Intel",
@@ -13373,7 +13373,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5218 CPU @ 2.30GHz",
"vendor": "Intel",
@@ -18403,7 +18403,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz",
"vendor": "Intel",
@@ -18611,7 +18611,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz",
"vendor": "Intel",
@@ -18819,7 +18819,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz",
"vendor": "Intel",
@@ -19027,7 +19027,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz",
"vendor": "Intel",
@@ -19235,7 +19235,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz",
"vendor": "Intel",
@@ -24978,7 +24978,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
@@ -25299,7 +25299,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
@@ -25620,7 +25620,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
@@ -25941,7 +25941,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
@@ -26262,7 +26262,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
@@ -26583,7 +26583,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
@@ -26904,7 +26904,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
@@ -27225,7 +27225,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
@@ -27546,7 +27546,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
@@ -27867,7 +27867,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
@@ -34975,7 +34975,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7742 64-Core Processor",
"vendor": "AMD",
@@ -96175,7 +96175,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6248 CPU @ 2.50GHz",
"vendor": "Intel",
@@ -96674,7 +96674,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4214 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -101412,7 +101412,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -101583,7 +101583,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -101754,7 +101754,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -101925,7 +101925,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -102096,7 +102096,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -102267,7 +102267,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -102438,7 +102438,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -102609,7 +102609,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -102780,7 +102780,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -102951,7 +102951,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -103122,7 +103122,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -103293,7 +103293,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -103464,7 +103464,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -103635,7 +103635,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -103806,7 +103806,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -103977,7 +103977,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -104148,7 +104148,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -104319,7 +104319,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -104490,7 +104490,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -104661,7 +104661,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -104832,7 +104832,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -105003,7 +105003,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -105174,7 +105174,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -105345,7 +105345,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -105516,7 +105516,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -105687,7 +105687,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -105858,7 +105858,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -106029,7 +106029,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -106200,7 +106200,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -106371,7 +106371,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -106542,7 +106542,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -106713,7 +106713,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
@@ -131330,7 +131330,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
@@ -131490,7 +131490,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
@@ -131650,7 +131650,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
@@ -131810,7 +131810,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
@@ -131970,7 +131970,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
@@ -132130,7 +132130,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
@@ -132290,7 +132290,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
@@ -132450,7 +132450,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
@@ -133076,7 +133076,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7H12 64-Core Processor",
"vendor": "AMD",
@@ -138638,7 +138638,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -138926,7 +138926,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -139214,7 +139214,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -139502,7 +139502,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -140078,7 +140078,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -140366,7 +140366,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -140654,7 +140654,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -140942,7 +140942,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -141230,7 +141230,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -142652,7 +142652,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -142792,7 +142792,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -142932,7 +142932,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -143072,7 +143072,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -143212,7 +143212,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -143352,7 +143352,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -143492,7 +143492,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
@@ -143772,7 +143772,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/grenoble/clusters/servan/nodes/servan-1.json b/data/grid5000/sites/grenoble/clusters/servan/nodes/servan-1.json
index 250e4fe8165..4398b757293 100644
--- a/data/grid5000/sites/grenoble/clusters/servan/nodes/servan-1.json
+++ b/data/grid5000/sites/grenoble/clusters/servan/nodes/servan-1.json
@@ -370,7 +370,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7352 24-Core Processor",
"vendor": "AMD",
diff --git a/data/grid5000/sites/grenoble/clusters/servan/nodes/servan-2.json b/data/grid5000/sites/grenoble/clusters/servan/nodes/servan-2.json
index 2f35a0a9e09..7e3c242404e 100644
--- a/data/grid5000/sites/grenoble/clusters/servan/nodes/servan-2.json
+++ b/data/grid5000/sites/grenoble/clusters/servan/nodes/servan-2.json
@@ -370,7 +370,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7352 24-Core Processor",
"vendor": "AMD",
diff --git a/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-1.json b/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-1.json
index 95d5e68ffbd..ab423ba22f3 100644
--- a/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-1.json
+++ b/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-1.json
@@ -312,7 +312,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5218 CPU @ 2.30GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-2.json b/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-2.json
index d355925e09f..8aafb12c55a 100644
--- a/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-2.json
+++ b/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-2.json
@@ -312,7 +312,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5218 CPU @ 2.30GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-3.json b/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-3.json
index 508f7695c2c..d360a733dcb 100644
--- a/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-3.json
+++ b/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-3.json
@@ -312,7 +312,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5218 CPU @ 2.30GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-4.json b/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-4.json
index d219180573a..1e274993e1d 100644
--- a/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-4.json
+++ b/data/grid5000/sites/grenoble/clusters/troll/nodes/troll-4.json
@@ -312,7 +312,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5218 CPU @ 2.30GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-1.json b/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-1.json
index cb45d0daab7..f610ee1649b 100644
--- a/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-1.json
+++ b/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-1.json
@@ -278,7 +278,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-2.json b/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-2.json
index 91e74725ed2..751fc1b63d6 100644
--- a/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-2.json
+++ b/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-2.json
@@ -278,7 +278,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-3.json b/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-3.json
index 37bd6301e13..49893a57e86 100644
--- a/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-3.json
+++ b/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-3.json
@@ -278,7 +278,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-4.json b/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-4.json
index a06b62ded93..293f95430e2 100644
--- a/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-4.json
+++ b/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-4.json
@@ -278,7 +278,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-5.json b/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-5.json
index c282ad8cd26..12d7b58ca5d 100644
--- a/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-5.json
+++ b/data/grid5000/sites/lille/clusters/chirop/nodes/chirop-5.json
@@ -278,7 +278,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-1.json b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-1.json
index 146c817cadc..2985e0c708a 100644
--- a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-1.json
+++ b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-1.json
@@ -394,7 +394,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
diff --git a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-10.json b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-10.json
index 5ba8ab33948..7cab4f90fba 100644
--- a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-10.json
+++ b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-10.json
@@ -394,7 +394,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
diff --git a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-2.json b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-2.json
index 4901731cdc4..8c1f9ba11a3 100644
--- a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-2.json
+++ b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-2.json
@@ -394,7 +394,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
diff --git a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-3.json b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-3.json
index 0bf16e2eb97..867a1d4f4cd 100644
--- a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-3.json
+++ b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-3.json
@@ -394,7 +394,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
diff --git a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-4.json b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-4.json
index 5edb7f9097d..1293f694662 100644
--- a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-4.json
+++ b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-4.json
@@ -394,7 +394,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
diff --git a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-5.json b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-5.json
index 38b8e8d28e5..fab747bcc00 100644
--- a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-5.json
+++ b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-5.json
@@ -394,7 +394,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
diff --git a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-6.json b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-6.json
index cf8c75bd4a8..5db635a3cb9 100644
--- a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-6.json
+++ b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-6.json
@@ -394,7 +394,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
diff --git a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-7.json b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-7.json
index d58cf540363..04420a44ca0 100644
--- a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-7.json
+++ b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-7.json
@@ -394,7 +394,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
diff --git a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-8.json b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-8.json
index 8914317752c..3da4eb050e3 100644
--- a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-8.json
+++ b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-8.json
@@ -394,7 +394,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
diff --git a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-9.json b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-9.json
index 02e0f2e6241..47272e4c28e 100644
--- a/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-9.json
+++ b/data/grid5000/sites/lyon/clusters/neowise/nodes/neowise-9.json
@@ -394,7 +394,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7642 48-Core Processor",
"vendor": "AMD",
diff --git a/data/grid5000/sites/lyon/clusters/sirius/nodes/sirius-1.json b/data/grid5000/sites/lyon/clusters/sirius/nodes/sirius-1.json
index 4510b5ba788..c9030c816a7 100644
--- a/data/grid5000/sites/lyon/clusters/sirius/nodes/sirius-1.json
+++ b/data/grid5000/sites/lyon/clusters/sirius/nodes/sirius-1.json
@@ -596,7 +596,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7742 64-Core Processor",
"vendor": "AMD",
diff --git a/data/grid5000/sites/rennes/clusters/abacus12/nodes/abacus12-1.json b/data/grid5000/sites/rennes/clusters/abacus12/nodes/abacus12-1.json
index efe3ae6e53e..6efe1fd0030 100644
--- a/data/grid5000/sites/rennes/clusters/abacus12/nodes/abacus12-1.json
+++ b/data/grid5000/sites/rennes/clusters/abacus12/nodes/abacus12-1.json
@@ -265,7 +265,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6248 CPU @ 2.50GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/abacus16/nodes/abacus16-1.json b/data/grid5000/sites/rennes/clusters/abacus16/nodes/abacus16-1.json
index 99c87ca0a4b..ee364a3fed4 100644
--- a/data/grid5000/sites/rennes/clusters/abacus16/nodes/abacus16-1.json
+++ b/data/grid5000/sites/rennes/clusters/abacus16/nodes/abacus16-1.json
@@ -284,7 +284,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4214 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-1.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-1.json
index 93f24553e38..477dd838d77 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-1.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-1.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-10.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-10.json
index 44be9828caf..e7ba1f7e207 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-10.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-10.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-11.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-11.json
index b8a8936ccc7..bcbd495d8f5 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-11.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-11.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-12.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-12.json
index f897aabd979..6fea8736fbf 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-12.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-12.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-13.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-13.json
index b209bc517e0..64e0cf6db1c 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-13.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-13.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-14.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-14.json
index d0f374c974f..59196d1335d 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-14.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-14.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-15.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-15.json
index 670a23323db..11505efeac8 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-15.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-15.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-16.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-16.json
index fd7c110e822..775d7747340 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-16.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-16.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-17.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-17.json
index d5ba20ecbcd..84faac440a9 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-17.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-17.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-18.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-18.json
index 1947ee25932..c2d16b24a24 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-18.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-18.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-19.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-19.json
index 95c61062b89..ba73394bd62 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-19.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-19.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-2.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-2.json
index 983532d7941..724aa7f15f3 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-2.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-2.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-20.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-20.json
index 4740b5c5b2d..f75f10813e3 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-20.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-20.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-21.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-21.json
index c32e4684d8b..b30cc96e1b7 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-21.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-21.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-22.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-22.json
index f2ff5810eb8..48965b6a9fc 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-22.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-22.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-23.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-23.json
index 030536824d5..90648c49a6c 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-23.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-23.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-24.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-24.json
index f0f4cdd2d4a..dc6478b450e 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-24.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-24.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-25.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-25.json
index 8208c4b3414..77214da99ec 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-25.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-25.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-26.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-26.json
index 571b1979155..8d88d1773af 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-26.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-26.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-27.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-27.json
index 43b458d6f3b..1b30c030210 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-27.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-27.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-28.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-28.json
index a9e52669bae..ab56847da36 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-28.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-28.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-29.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-29.json
index 28e5623dc8f..97cd92be8d9 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-29.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-29.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-3.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-3.json
index 27b533f220e..92ce356223c 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-3.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-3.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-30.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-30.json
index 0e364fe1a9c..438a3d8f6c0 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-30.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-30.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-31.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-31.json
index 8a988fd336a..4f8555b8c09 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-31.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-31.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-32.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-32.json
index 41f09988b5f..f65c7ff0045 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-32.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-32.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-4.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-4.json
index f5e180886fc..219969ebbbd 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-4.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-4.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-5.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-5.json
index d4b959655c4..f1924a6e6d6 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-5.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-5.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-6.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-6.json
index 19ae1a3d136..0f648b74441 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-6.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-6.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-7.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-7.json
index 2ee07151760..8320e9ccbe4 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-7.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-7.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-8.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-8.json
index 95dc97c74c4..77b3a7bd30a 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-8.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-8.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-9.json b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-9.json
index c1c34d72c30..3435e5bda6a 100644
--- a/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-9.json
+++ b/data/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-9.json
@@ -223,7 +223,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-1.json b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-1.json
index 411ff877d7e..d9840e2069a 100644
--- a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-1.json
+++ b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-1.json
@@ -168,7 +168,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-2.json b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-2.json
index 4176b9b6a10..f433ba2965d 100644
--- a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-2.json
+++ b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-2.json
@@ -168,7 +168,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-3.json b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-3.json
index dd335405357..d282129ef9e 100644
--- a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-3.json
+++ b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-3.json
@@ -168,7 +168,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-4.json b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-4.json
index 8e42031ff54..5ddba3662c0 100644
--- a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-4.json
+++ b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-4.json
@@ -168,7 +168,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-5.json b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-5.json
index ec411816985..fcb5a8a5661 100644
--- a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-5.json
+++ b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-5.json
@@ -168,7 +168,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-6.json b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-6.json
index fec5fd02861..3b33b24e9a3 100644
--- a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-6.json
+++ b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-6.json
@@ -168,7 +168,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-7.json b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-7.json
index 7fb9c005007..d594aa6ec1b 100644
--- a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-7.json
+++ b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-7.json
@@ -168,7 +168,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-8.json b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-8.json
index 186a995fe05..6f1bebce9b7 100644
--- a/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-8.json
+++ b/data/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-8.json
@@ -168,7 +168,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Cascade Lake-SP",
- "microcode": "0x5003605",
+ "microcode": "0x5003707",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/rennes/clusters/roazhon4/nodes/roazhon4-1.json b/data/grid5000/sites/rennes/clusters/roazhon4/nodes/roazhon4-1.json
index f7d826bdbb7..fbe91d2105b 100644
--- a/data/grid5000/sites/rennes/clusters/roazhon4/nodes/roazhon4-1.json
+++ b/data/grid5000/sites/rennes/clusters/roazhon4/nodes/roazhon4-1.json
@@ -222,7 +222,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Zen 2",
- "microcode": "0x830107a",
+ "microcode": "0x830107c",
"model": "AMD EPYC",
"other_description": "AMD EPYC 7H12 64-Core Processor",
"vendor": "AMD",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.json
index 77c936d8f37..1e790c32532 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.json
@@ -263,7 +263,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.json
index bb7ce44ecf1..90c79a7d1ee 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.json
@@ -263,7 +263,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.json
index ff533d95d92..72503a0d08e 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.json
@@ -263,7 +263,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.json
index 7953f3c117a..1caba9d7df4 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.json
@@ -263,7 +263,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.json
index a808345bec8..79bb9537a8d 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.json
@@ -263,7 +263,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.json
index 48db3c6aae7..19e0263d415 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.json
@@ -263,7 +263,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.json
index 663ace0da17..2551060c90b 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.json
@@ -263,7 +263,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.json
index 2f6de45ffae..31f91eb43db 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.json
@@ -263,7 +263,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.json
index 9bf49f9076d..1f08d1289f1 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.json
@@ -263,7 +263,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-10.json b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-10.json
index 42aa1d184a1..aeb6ab06084 100644
--- a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-10.json
+++ b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-10.json
@@ -192,7 +192,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-2.json b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-2.json
index d7c58107b19..4a63777a2b6 100644
--- a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-2.json
+++ b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-2.json
@@ -192,7 +192,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-3.json b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-3.json
index 05107b469e4..8cde55f4e20 100644
--- a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-3.json
+++ b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-3.json
@@ -192,7 +192,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-4.json b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-4.json
index fe84799367e..d472d55be76 100644
--- a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-4.json
+++ b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-4.json
@@ -192,7 +192,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-5.json b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-5.json
index 456e0ae0061..6afae9d0972 100644
--- a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-5.json
+++ b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-5.json
@@ -192,7 +192,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-6.json b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-6.json
index ff7229f09c3..24228a3a7db 100644
--- a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-6.json
+++ b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-6.json
@@ -192,7 +192,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-7.json b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-7.json
index 6f52f25e5fd..75485db69b4 100644
--- a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-7.json
+++ b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-7.json
@@ -192,7 +192,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-9.json b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-9.json
index 3a48399b3ec..e68e7ff4265 100644
--- a/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-9.json
+++ b/data/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-9.json
@@ -192,7 +192,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake-SP",
- "microcode": "0xd0003d1",
+ "microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/input/grid5000/sites/grenoble/clusters/servan/nodes/servan-1.yaml b/input/grid5000/sites/grenoble/clusters/servan/nodes/servan-1.yaml
index ec290b195b9..de49e02f663 100644
--- a/input/grid5000/sites/grenoble/clusters/servan/nodes/servan-1.yaml
+++ b/input/grid5000/sites/grenoble/clusters/servan/nodes/servan-1.yaml
@@ -113,7 +113,7 @@ servan-1:
cache_l3: 16777216
ht_capable: true
instruction_set: x86-64
- microcode: '0x830107a'
+ microcode: '0x830107c'
model: AMD EPYC
other_description: AMD EPYC 7352 24-Core Processor
vendor: AMD
diff --git a/input/grid5000/sites/grenoble/clusters/servan/nodes/servan-2.yaml b/input/grid5000/sites/grenoble/clusters/servan/nodes/servan-2.yaml
index d1b22d0380f..21b51482259 100644
--- a/input/grid5000/sites/grenoble/clusters/servan/nodes/servan-2.yaml
+++ b/input/grid5000/sites/grenoble/clusters/servan/nodes/servan-2.yaml
@@ -113,7 +113,7 @@ servan-2:
cache_l3: 16777216
ht_capable: true
instruction_set: x86-64
- microcode: '0x830107a'
+ microcode: '0x830107c'
model: AMD EPYC
other_description: AMD EPYC 7352 24-Core Processor
vendor: AMD
diff --git a/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-1.yaml b/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-1.yaml
index f255948d1f5..b921f0c68fb 100644
--- a/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-1.yaml
+++ b/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-1.yaml
@@ -159,7 +159,7 @@ troll-1:
cache_l3: 23068672
ht_capable: true
instruction_set: x86-64
- microcode: '0x5003605'
+ microcode: '0x5003707'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5218 CPU @ 2.30GHz
vendor: Intel
diff --git a/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-2.yaml b/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-2.yaml
index e9ee7d78b15..acf0d0187d6 100644
--- a/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-2.yaml
+++ b/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-2.yaml
@@ -159,7 +159,7 @@ troll-2:
cache_l3: 23068672
ht_capable: true
instruction_set: x86-64
- microcode: '0x5003605'
+ microcode: '0x5003707'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5218 CPU @ 2.30GHz
vendor: Intel
diff --git a/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-3.yaml b/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-3.yaml
index 4ab412d63e9..6745524a4fe 100644
--- a/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-3.yaml
+++ b/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-3.yaml
@@ -159,7 +159,7 @@ troll-3:
cache_l3: 23068672
ht_capable: true
instruction_set: x86-64
- microcode: '0x5003605'
+ microcode: '0x5003707'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5218 CPU @ 2.30GHz
vendor: Intel
diff --git a/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-4.yaml b/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-4.yaml
index b21af5cb069..c8de99a528d 100644
--- a/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-4.yaml
+++ b/input/grid5000/sites/grenoble/clusters/troll/nodes/troll-4.yaml
@@ -159,7 +159,7 @@ troll-4:
cache_l3: 23068672
ht_capable: true
instruction_set: x86-64
- microcode: '0x5003605'
+ microcode: '0x5003707'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5218 CPU @ 2.30GHz
vendor: Intel
diff --git a/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-1.yaml b/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-1.yaml
index b6e0aa984bd..41e290469f3 100644
--- a/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-1.yaml
+++ b/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-1.yaml
@@ -111,7 +111,7 @@ chirop-1:
cache_l3: 50331648
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz
vendor: Intel
diff --git a/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-2.yaml b/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-2.yaml
index 0333713c83c..7b6ac7d34a5 100644
--- a/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-2.yaml
+++ b/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-2.yaml
@@ -111,7 +111,7 @@ chirop-2:
cache_l3: 50331648
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz
vendor: Intel
diff --git a/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-3.yaml b/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-3.yaml
index 48e94453749..52277256922 100644
--- a/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-3.yaml
+++ b/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-3.yaml
@@ -111,7 +111,7 @@ chirop-3:
cache_l3: 50331648
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz
vendor: Intel
diff --git a/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-4.yaml b/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-4.yaml
index 2ba31abddbf..f281e25ce2d 100644
--- a/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-4.yaml
+++ b/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-4.yaml
@@ -111,7 +111,7 @@ chirop-4:
cache_l3: 50331648
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz
vendor: Intel
diff --git a/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-5.yaml b/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-5.yaml
index 54c043f1bc6..01763279fd9 100644
--- a/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-5.yaml
+++ b/input/grid5000/sites/lille/clusters/chirop/nodes/chirop-5.yaml
@@ -111,7 +111,7 @@ chirop-5:
cache_l3: 50331648
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Platinum 8358 CPU @ 2.60GHz
vendor: Intel
diff --git a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-1.yaml b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-1.yaml
index 2abf37406a8..3363413749e 100644
--- a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-1.yaml
+++ b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-1.yaml
@@ -183,7 +183,7 @@ neowise-1:
cache_l3: 16777216
ht_capable: true
instruction_set: x86-64
- microcode: '0x830107a'
+ microcode: '0x830107c'
model: AMD EPYC
other_description: AMD EPYC 7642 48-Core Processor
vendor: AMD
diff --git a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-10.yaml b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-10.yaml
index 76712423e1f..7971dd4e773 100644
--- a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-10.yaml
+++ b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-10.yaml
@@ -183,7 +183,7 @@ neowise-10:
cache_l3: 16777216
ht_capable: true
instruction_set: x86-64
- microcode: '0x830107a'
+ microcode: '0x830107c'
model: AMD EPYC
other_description: AMD EPYC 7642 48-Core Processor
vendor: AMD
diff --git a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-2.yaml b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-2.yaml
index 7a745228e46..f62b22f86ab 100644
--- a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-2.yaml
+++ b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-2.yaml
@@ -183,7 +183,7 @@ neowise-2:
cache_l3: 16777216
ht_capable: true
instruction_set: x86-64
- microcode: '0x830107a'
+ microcode: '0x830107c'
model: AMD EPYC
other_description: AMD EPYC 7642 48-Core Processor
vendor: AMD
diff --git a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-3.yaml b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-3.yaml
index a31da95f88d..a2ce21b21f9 100644
--- a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-3.yaml
+++ b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-3.yaml
@@ -183,7 +183,7 @@ neowise-3:
cache_l3: 16777216
ht_capable: true
instruction_set: x86-64
- microcode: '0x830107a'
+ microcode: '0x830107c'
model: AMD EPYC
other_description: AMD EPYC 7642 48-Core Processor
vendor: AMD
diff --git a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-4.yaml b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-4.yaml
index cd31131e662..65a9e1ac54e 100644
--- a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-4.yaml
+++ b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-4.yaml
@@ -183,7 +183,7 @@ neowise-4:
cache_l3: 16777216
ht_capable: true
instruction_set: x86-64
- microcode: '0x830107a'
+ microcode: '0x830107c'
model: AMD EPYC
other_description: AMD EPYC 7642 48-Core Processor
vendor: AMD
diff --git a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-5.yaml b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-5.yaml
index 46179e773fa..a70bc2d0047 100644
--- a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-5.yaml
+++ b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-5.yaml
@@ -183,7 +183,7 @@ neowise-5:
cache_l3: 16777216
ht_capable: true
instruction_set: x86-64
- microcode: '0x830107a'
+ microcode: '0x830107c'
model: AMD EPYC
other_description: AMD EPYC 7642 48-Core Processor
vendor: AMD
diff --git a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-6.yaml b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-6.yaml
index 7ec79bf52f7..0ccab98125f 100644
--- a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-6.yaml
+++ b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-6.yaml
@@ -183,7 +183,7 @@ neowise-6:
cache_l3: 16777216
ht_capable: true
instruction_set: x86-64
- microcode: '0x830107a'
+ microcode: '0x830107c'
model: AMD EPYC
other_description: AMD EPYC 7642 48-Core Processor
vendor: AMD
diff --git a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-7.yaml b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-7.yaml
index 526f9a8bb53..2cd16b03786 100644
--- a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-7.yaml
+++ b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-7.yaml
@@ -183,7 +183,7 @@ neowise-7:
cache_l3: 16777216
ht_capable: true
instruction_set: x86-64
- microcode: '0x830107a'
+ microcode: '0x830107c'
model: AMD EPYC
other_description: AMD EPYC 7642 48-Core Processor
vendor: AMD
diff --git a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-8.yaml b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-8.yaml
index edde6a7a460..e00d0a6d055 100644
--- a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-8.yaml
+++ b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-8.yaml
@@ -183,7 +183,7 @@ neowise-8:
cache_l3: 16777216
ht_capable: true
instruction_set: x86-64
- microcode: '0x830107a'
+ microcode: '0x830107c'
model: AMD EPYC
other_description: AMD EPYC 7642 48-Core Processor
vendor: AMD
diff --git a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-9.yaml b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-9.yaml
index 4edb0c0981e..63a6e30b185 100644
--- a/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-9.yaml
+++ b/input/grid5000/sites/lyon/clusters/neowise/nodes/neowise-9.yaml
@@ -183,7 +183,7 @@ neowise-9:
cache_l3: 16777216
ht_capable: true
instruction_set: x86-64
- microcode: '0x830107a'
+ microcode: '0x830107c'
model: AMD EPYC
other_description: AMD EPYC 7642 48-Core Processor
vendor: AMD
diff --git a/input/grid5000/sites/lyon/clusters/sirius/nodes/sirius-1.yaml b/input/grid5000/sites/lyon/clusters/sirius/nodes/sirius-1.yaml
index 97c442a45a9..7b14d16f62f 100644
--- a/input/grid5000/sites/lyon/clusters/sirius/nodes/sirius-1.yaml
+++ b/input/grid5000/sites/lyon/clusters/sirius/nodes/sirius-1.yaml
@@ -290,7 +290,7 @@ sirius-1:
cache_l3: 16777216
ht_capable: true
instruction_set: x86-64
- microcode: '0x830107a'
+ microcode: '0x830107c'
model: AMD EPYC
other_description: AMD EPYC 7742 64-Core Processor
vendor: AMD
diff --git a/input/grid5000/sites/rennes/clusters/abacus12/nodes/abacus12-1.yaml b/input/grid5000/sites/rennes/clusters/abacus12/nodes/abacus12-1.yaml
index c72b0409673..ae8fe1b2f0b 100644
--- a/input/grid5000/sites/rennes/clusters/abacus12/nodes/abacus12-1.yaml
+++ b/input/grid5000/sites/rennes/clusters/abacus12/nodes/abacus12-1.yaml
@@ -123,7 +123,7 @@ abacus12-1:
cache_l3: 28835840
ht_capable: true
instruction_set: x86-64
- microcode: '0x5003605'
+ microcode: '0x5003707'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 6248 CPU @ 2.50GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/abacus16/nodes/abacus16-1.yaml b/input/grid5000/sites/rennes/clusters/abacus16/nodes/abacus16-1.yaml
index cfddcfcf4e0..347437ce4a9 100644
--- a/input/grid5000/sites/rennes/clusters/abacus16/nodes/abacus16-1.yaml
+++ b/input/grid5000/sites/rennes/clusters/abacus16/nodes/abacus16-1.yaml
@@ -131,7 +131,7 @@ abacus16-1:
cache_l3: 17301504
ht_capable: true
instruction_set: x86-64
- microcode: '0x5003605'
+ microcode: '0x5003707'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4214 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-1.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-1.yaml
index 3c04a241b5d..248adf0c828 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-1.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-1.yaml
@@ -98,7 +98,7 @@ paradoxe-1:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-10.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-10.yaml
index 5ef51fcb2b0..94454c988db 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-10.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-10.yaml
@@ -98,7 +98,7 @@ paradoxe-10:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-11.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-11.yaml
index 29bd63c6049..6777b5d1551 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-11.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-11.yaml
@@ -98,7 +98,7 @@ paradoxe-11:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-12.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-12.yaml
index b641739b137..1558acf029e 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-12.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-12.yaml
@@ -98,7 +98,7 @@ paradoxe-12:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-13.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-13.yaml
index 48aa6ca5cdc..e5f98601569 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-13.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-13.yaml
@@ -98,7 +98,7 @@ paradoxe-13:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-14.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-14.yaml
index 458ff6fcf10..9460dc33d05 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-14.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-14.yaml
@@ -98,7 +98,7 @@ paradoxe-14:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-15.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-15.yaml
index 6f9510bf03e..f78a4b38592 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-15.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-15.yaml
@@ -98,7 +98,7 @@ paradoxe-15:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-16.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-16.yaml
index 83438cea3dd..0523421f48c 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-16.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-16.yaml
@@ -98,7 +98,7 @@ paradoxe-16:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-17.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-17.yaml
index 63afb74ef9e..bf5b16fd8ac 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-17.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-17.yaml
@@ -98,7 +98,7 @@ paradoxe-17:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-18.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-18.yaml
index 4cb644cacf2..ca386d25c40 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-18.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-18.yaml
@@ -98,7 +98,7 @@ paradoxe-18:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-19.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-19.yaml
index de2756711a9..833b9974784 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-19.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-19.yaml
@@ -98,7 +98,7 @@ paradoxe-19:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-2.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-2.yaml
index 58779ccb687..f3a098d9693 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-2.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-2.yaml
@@ -98,7 +98,7 @@ paradoxe-2:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-20.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-20.yaml
index 1d0e4b7af64..93bfac88378 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-20.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-20.yaml
@@ -98,7 +98,7 @@ paradoxe-20:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-21.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-21.yaml
index 831702a7834..9b5920c7a4a 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-21.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-21.yaml
@@ -98,7 +98,7 @@ paradoxe-21:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-22.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-22.yaml
index 7b697dd9bc6..40708a75ef9 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-22.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-22.yaml
@@ -98,7 +98,7 @@ paradoxe-22:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-23.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-23.yaml
index 09a6eba7f28..35b88845125 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-23.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-23.yaml
@@ -98,7 +98,7 @@ paradoxe-23:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-24.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-24.yaml
index 7d6150ecd38..ed6223feacf 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-24.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-24.yaml
@@ -98,7 +98,7 @@ paradoxe-24:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-25.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-25.yaml
index 8b02d0ea333..5e33260504c 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-25.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-25.yaml
@@ -98,7 +98,7 @@ paradoxe-25:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-26.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-26.yaml
index 9ad92748795..319a974b897 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-26.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-26.yaml
@@ -98,7 +98,7 @@ paradoxe-26:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-27.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-27.yaml
index 5b7ed8ce995..fffae0888b3 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-27.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-27.yaml
@@ -98,7 +98,7 @@ paradoxe-27:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-28.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-28.yaml
index b3f49a92e54..584487b5dec 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-28.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-28.yaml
@@ -98,7 +98,7 @@ paradoxe-28:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-29.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-29.yaml
index 23f0760e9c1..06f3130d022 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-29.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-29.yaml
@@ -98,7 +98,7 @@ paradoxe-29:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-3.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-3.yaml
index 6002c6a7bfd..2043c31d424 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-3.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-3.yaml
@@ -98,7 +98,7 @@ paradoxe-3:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-30.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-30.yaml
index 3eed20e0a5f..e5ac2779f7a 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-30.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-30.yaml
@@ -98,7 +98,7 @@ paradoxe-30:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-31.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-31.yaml
index 8e067c3bb99..2653d713dde 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-31.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-31.yaml
@@ -98,7 +98,7 @@ paradoxe-31:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-32.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-32.yaml
index f4e9db91866..d450f3907e8 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-32.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-32.yaml
@@ -98,7 +98,7 @@ paradoxe-32:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-4.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-4.yaml
index 4864f449520..c7817de65b6 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-4.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-4.yaml
@@ -98,7 +98,7 @@ paradoxe-4:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-5.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-5.yaml
index 70595608348..49f6043c678 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-5.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-5.yaml
@@ -98,7 +98,7 @@ paradoxe-5:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-6.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-6.yaml
index fef12dd1b51..e77448a245d 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-6.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-6.yaml
@@ -98,7 +98,7 @@ paradoxe-6:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-7.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-7.yaml
index 677eac02100..460f1f2547f 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-7.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-7.yaml
@@ -98,7 +98,7 @@ paradoxe-7:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-8.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-8.yaml
index 72d92c8cc45..98db06f251f 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-8.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-8.yaml
@@ -98,7 +98,7 @@ paradoxe-8:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-9.yaml b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-9.yaml
index 9eb6329428b..7e02fe1ccae 100644
--- a/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-9.yaml
+++ b/input/grid5000/sites/rennes/clusters/paradoxe/nodes/paradoxe-9.yaml
@@ -98,7 +98,7 @@ paradoxe-9:
cache_l3: 40894464
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 5320 CPU @ 2.20GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-1.yaml b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-1.yaml
index 26f5724ec08..b4fd1c40f58 100644
--- a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-1.yaml
+++ b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-1.yaml
@@ -98,7 +98,7 @@ roazhon13-1:
cache_l3: 25952256
ht_capable: true
instruction_set: x86-64
- microcode: '0x5003605'
+ microcode: '0x5003707'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-2.yaml b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-2.yaml
index 22726f3dc0f..4651c4b0213 100644
--- a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-2.yaml
+++ b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-2.yaml
@@ -98,7 +98,7 @@ roazhon13-2:
cache_l3: 25952256
ht_capable: true
instruction_set: x86-64
- microcode: '0x5003605'
+ microcode: '0x5003707'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-3.yaml b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-3.yaml
index 5ede48098f7..9aaaf912d6b 100644
--- a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-3.yaml
+++ b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-3.yaml
@@ -98,7 +98,7 @@ roazhon13-3:
cache_l3: 25952256
ht_capable: true
instruction_set: x86-64
- microcode: '0x5003605'
+ microcode: '0x5003707'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-4.yaml b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-4.yaml
index 5b5b3e89a8b..c4df16c7e50 100644
--- a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-4.yaml
+++ b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-4.yaml
@@ -98,7 +98,7 @@ roazhon13-4:
cache_l3: 25952256
ht_capable: true
instruction_set: x86-64
- microcode: '0x5003605'
+ microcode: '0x5003707'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-5.yaml b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-5.yaml
index b57504be4d4..63af1bfdbd7 100644
--- a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-5.yaml
+++ b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-5.yaml
@@ -98,7 +98,7 @@ roazhon13-5:
cache_l3: 25952256
ht_capable: true
instruction_set: x86-64
- microcode: '0x5003605'
+ microcode: '0x5003707'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-6.yaml b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-6.yaml
index 6c0980d575f..2164c243781 100644
--- a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-6.yaml
+++ b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-6.yaml
@@ -98,7 +98,7 @@ roazhon13-6:
cache_l3: 25952256
ht_capable: true
instruction_set: x86-64
- microcode: '0x5003605'
+ microcode: '0x5003707'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-7.yaml b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-7.yaml
index 63282a2b171..448d48e78c2 100644
--- a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-7.yaml
+++ b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-7.yaml
@@ -98,7 +98,7 @@ roazhon13-7:
cache_l3: 25952256
ht_capable: true
instruction_set: x86-64
- microcode: '0x5003605'
+ microcode: '0x5003707'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-8.yaml b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-8.yaml
index 78d72a91b08..365cfb1ddcf 100644
--- a/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-8.yaml
+++ b/input/grid5000/sites/rennes/clusters/roazhon13/nodes/roazhon13-8.yaml
@@ -98,7 +98,7 @@ roazhon13-8:
cache_l3: 25952256
ht_capable: true
instruction_set: x86-64
- microcode: '0x5003605'
+ microcode: '0x5003707'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Gold 6254 CPU @ 3.10GHz
vendor: Intel
diff --git a/input/grid5000/sites/rennes/clusters/roazhon4/nodes/roazhon4-1.yaml b/input/grid5000/sites/rennes/clusters/roazhon4/nodes/roazhon4-1.yaml
index 412817f7405..1f2a512f7a5 100644
--- a/input/grid5000/sites/rennes/clusters/roazhon4/nodes/roazhon4-1.yaml
+++ b/input/grid5000/sites/rennes/clusters/roazhon4/nodes/roazhon4-1.yaml
@@ -132,7 +132,7 @@ roazhon4-1:
cache_l3: 16777216
ht_capable: true
instruction_set: x86-64
- microcode: '0x830107a'
+ microcode: '0x830107c'
model: AMD EPYC
other_description: AMD EPYC 7H12 64-Core Processor
vendor: AMD
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.yaml
index 83295d8eaad..e5c59860717 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.yaml
@@ -156,7 +156,7 @@ fleckenstein-1:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.yaml
index 5116bd5d616..fb1201b7ea1 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.yaml
@@ -156,7 +156,7 @@ fleckenstein-10:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.yaml
index 91334b59a95..761df161658 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.yaml
@@ -156,7 +156,7 @@ fleckenstein-2:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.yaml
index 7b2fb475170..8feb4e923f0 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.yaml
@@ -156,7 +156,7 @@ fleckenstein-3:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.yaml
index e5d6e31825b..81e7f185dce 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.yaml
@@ -156,7 +156,7 @@ fleckenstein-5:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.yaml
index fc577500fdd..a244f3ad144 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.yaml
@@ -156,7 +156,7 @@ fleckenstein-6:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.yaml
index 6dafa004231..77290826d85 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.yaml
@@ -156,7 +156,7 @@ fleckenstein-7:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.yaml
index f52a10f634b..b62e7355000 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.yaml
@@ -156,7 +156,7 @@ fleckenstein-8:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.yaml
index 489c43e3614..17a7f27b7f7 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.yaml
@@ -156,7 +156,7 @@ fleckenstein-9:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-10.yaml b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-10.yaml
index a592938d9c5..a14c1d8ca2b 100644
--- a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-10.yaml
+++ b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-10.yaml
@@ -86,7 +86,7 @@ montcalm-10:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-2.yaml b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-2.yaml
index 3f9a5df9677..415ff24c09b 100644
--- a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-2.yaml
+++ b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-2.yaml
@@ -86,7 +86,7 @@ montcalm-2:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-3.yaml b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-3.yaml
index 808422724ce..1271985af2c 100644
--- a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-3.yaml
+++ b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-3.yaml
@@ -86,7 +86,7 @@ montcalm-3:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-4.yaml b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-4.yaml
index dbf8249782c..d365b7caba4 100644
--- a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-4.yaml
+++ b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-4.yaml
@@ -86,7 +86,7 @@ montcalm-4:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-5.yaml b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-5.yaml
index 559c78e5267..d17d5adea8c 100644
--- a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-5.yaml
+++ b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-5.yaml
@@ -86,7 +86,7 @@ montcalm-5:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-6.yaml b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-6.yaml
index e5f333432dd..5e01d0f3161 100644
--- a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-6.yaml
+++ b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-6.yaml
@@ -86,7 +86,7 @@ montcalm-6:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-7.yaml b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-7.yaml
index d1b351a8d11..c51ef4a1463 100644
--- a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-7.yaml
+++ b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-7.yaml
@@ -86,7 +86,7 @@ montcalm-7:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-9.yaml b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-9.yaml
index 255b9f02e21..969b91a2068 100644
--- a/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-9.yaml
+++ b/input/grid5000/sites/toulouse/clusters/montcalm/nodes/montcalm-9.yaml
@@ -86,7 +86,7 @@ montcalm-9:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003d1'
+ microcode: '0xd0003e7'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
--
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