diff --git a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-1.json b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-1.json
index cd188ef307ed7ea681f733c798dc6cc7171a870b..e5f3c53b1a115d542d216916a6ec08ba87e434ab 100644
--- a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-1.json
+++ b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-1.json
@@ -220,7 +220,7 @@
     "ht_capable": true,
     "instruction_set": "x86-64",
     "microarchitecture": "Skylake",
-    "microcode": "0x200005e",
+    "microcode": "0x2000065",
     "model": "Intel Xeon",
     "other_description": "Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz",
     "vendor": "Intel",
diff --git a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-2.json b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-2.json
index 786c9e1c37b4b0ad610bb9edcac04206864c73ee..40af6dd10c883966cb143ed17faafdc589afbff3 100644
--- a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-2.json
+++ b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-2.json
@@ -220,7 +220,7 @@
     "ht_capable": true,
     "instruction_set": "x86-64",
     "microarchitecture": "Skylake",
-    "microcode": "0x200005e",
+    "microcode": "0x2000065",
     "model": "Intel Xeon",
     "other_description": "Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz",
     "vendor": "Intel",
diff --git a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-3.json b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-3.json
index 677ae79d0a3fa656bdb72bbfb0448d29327d9a4a..7be1689925b7d59aa31b2d9fba912ac1bcaa2c36 100644
--- a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-3.json
+++ b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-3.json
@@ -220,7 +220,7 @@
     "ht_capable": true,
     "instruction_set": "x86-64",
     "microarchitecture": "Skylake",
-    "microcode": "0x200005e",
+    "microcode": "0x2000065",
     "model": "Intel Xeon",
     "other_description": "Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz",
     "vendor": "Intel",
diff --git a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-4.json b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-4.json
index ba78d3f5bc192ef3cbfbebccf1355cccdedb08cf..705783b4ff339db69d03911480cf91b4e94bcabc 100644
--- a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-4.json
+++ b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-4.json
@@ -220,7 +220,7 @@
     "ht_capable": true,
     "instruction_set": "x86-64",
     "microarchitecture": "Skylake",
-    "microcode": "0x200005e",
+    "microcode": "0x2000065",
     "model": "Intel Xeon",
     "other_description": "Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz",
     "vendor": "Intel",
diff --git a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-5.json b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-5.json
index 1967d9d499faf072678e252f094b806d4a77e264..89b3bc370575fb87dbffa0489d8b5b9ecdb30a16 100644
--- a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-5.json
+++ b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-5.json
@@ -220,7 +220,7 @@
     "ht_capable": true,
     "instruction_set": "x86-64",
     "microarchitecture": "Skylake",
-    "microcode": "0x200005e",
+    "microcode": "0x2000065",
     "model": "Intel Xeon",
     "other_description": "Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz",
     "vendor": "Intel",
diff --git a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-6.json b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-6.json
index 39f27105fe04d7408930847704500fb3a5c688da..657e7089ff575182b586a1c426e2660cab1930c9 100644
--- a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-6.json
+++ b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-6.json
@@ -220,7 +220,7 @@
     "ht_capable": true,
     "instruction_set": "x86-64",
     "microarchitecture": "Skylake",
-    "microcode": "0x200005e",
+    "microcode": "0x2000065",
     "model": "Intel Xeon",
     "other_description": "Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz",
     "vendor": "Intel",
diff --git a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-7.json b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-7.json
index 5d9bd4e32baf6f7037d85d67b3e521b7c5fce244..e45592cd4aaace0bf8cadd61b8f45186b76f50eb 100644
--- a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-7.json
+++ b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-7.json
@@ -220,7 +220,7 @@
     "ht_capable": true,
     "instruction_set": "x86-64",
     "microarchitecture": "Skylake",
-    "microcode": "0x200005e",
+    "microcode": "0x2000065",
     "model": "Intel Xeon",
     "other_description": "Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz",
     "vendor": "Intel",
diff --git a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-8.json b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-8.json
index 1e3b320ab3effb1ac421d28a68914440979cc55b..992231787893d837ba7506afcf1c062048daaea4 100644
--- a/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-8.json
+++ b/data/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-8.json
@@ -220,7 +220,7 @@
     "ht_capable": true,
     "instruction_set": "x86-64",
     "microarchitecture": "Skylake",
-    "microcode": "0x200005e",
+    "microcode": "0x2000065",
     "model": "Intel Xeon",
     "other_description": "Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz",
     "vendor": "Intel",
diff --git a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-1.yaml b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-1.yaml
index 8ae2dd49eb3ef21b3cc98d5eb99b97747202d3b4..63efb3ea7265902c2589b26bd2517ee35c137a4d 100644
--- a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-1.yaml
+++ b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-1.yaml
@@ -112,7 +112,7 @@ chifflot-1:
     clock_speed: 2600000000
     ht_capable: true
     instruction_set: x86-64
-    microcode: '0x200005e'
+    microcode: '0x2000065'
     model: Intel Xeon
     other_description: Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz
     vendor: Intel
diff --git a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-2.yaml b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-2.yaml
index 7ee3986ceb6deabb956d8fef100522948a62dd38..122247fe36e31ed2e0916409103f2e7ea965fb95 100644
--- a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-2.yaml
+++ b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-2.yaml
@@ -112,7 +112,7 @@ chifflot-2:
     clock_speed: 2600000000
     ht_capable: true
     instruction_set: x86-64
-    microcode: '0x200005e'
+    microcode: '0x2000065'
     model: Intel Xeon
     other_description: Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz
     vendor: Intel
diff --git a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-3.yaml b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-3.yaml
index 0379aad3c24b9ce21628ddf3c1474cf816c9b96b..6d717e7360de833ccfc07b7463cb2bb2bf888d4e 100644
--- a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-3.yaml
+++ b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-3.yaml
@@ -112,7 +112,7 @@ chifflot-3:
     clock_speed: 2600000000
     ht_capable: true
     instruction_set: x86-64
-    microcode: '0x200005e'
+    microcode: '0x2000065'
     model: Intel Xeon
     other_description: Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz
     vendor: Intel
diff --git a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-4.yaml b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-4.yaml
index 1ec3b4d6d97ec639c551dc49ac44ef09f5de11f1..0218d175294910639de3040ca1dcefaa7e2f0dbe 100644
--- a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-4.yaml
+++ b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-4.yaml
@@ -112,7 +112,7 @@ chifflot-4:
     clock_speed: 2600000000
     ht_capable: true
     instruction_set: x86-64
-    microcode: '0x200005e'
+    microcode: '0x2000065'
     model: Intel Xeon
     other_description: Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz
     vendor: Intel
diff --git a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-5.yaml b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-5.yaml
index 0daaf5ae834b2923cf02f611525c5f4e16ae2de8..6e091e25187432fe8ba93538c74db4bee6ecf0f3 100644
--- a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-5.yaml
+++ b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-5.yaml
@@ -112,7 +112,7 @@ chifflot-5:
     clock_speed: 2600000000
     ht_capable: true
     instruction_set: x86-64
-    microcode: '0x200005e'
+    microcode: '0x2000065'
     model: Intel Xeon
     other_description: Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz
     vendor: Intel
diff --git a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-6.yaml b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-6.yaml
index 08c64b227c5dd3002ed9ee25060d51162ae99af1..625a7e347c36f92770c72adcd829a1514dcb4c5c 100644
--- a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-6.yaml
+++ b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-6.yaml
@@ -112,7 +112,7 @@ chifflot-6:
     clock_speed: 2600000000
     ht_capable: true
     instruction_set: x86-64
-    microcode: '0x200005e'
+    microcode: '0x2000065'
     model: Intel Xeon
     other_description: Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz
     vendor: Intel
diff --git a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-7.yaml b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-7.yaml
index 56401c2af95cff074dbd4093673485cef6de1c74..70db99bcd9fc0f1ff05097319946722b70dfedcb 100644
--- a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-7.yaml
+++ b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-7.yaml
@@ -112,7 +112,7 @@ chifflot-7:
     clock_speed: 2600000000
     ht_capable: true
     instruction_set: x86-64
-    microcode: '0x200005e'
+    microcode: '0x2000065'
     model: Intel Xeon
     other_description: Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz
     vendor: Intel
diff --git a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-8.yaml b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-8.yaml
index ee6f58c1d64f770edaa4e60ae0d6757b3cdd4945..4e97026cdc7eb3030c21aac02f83de56d8a81754 100644
--- a/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-8.yaml
+++ b/input/grid5000/sites/lille/clusters/chifflot/nodes/chifflot-8.yaml
@@ -112,7 +112,7 @@ chifflot-8:
     clock_speed: 2600000000
     ht_capable: true
     instruction_set: x86-64
-    microcode: '0x200005e'
+    microcode: '0x2000065'
     model: Intel Xeon
     other_description: Intel(R) Xeon(R) Gold 6126 CPU @ 2.60GHz
     vendor: Intel