diff --git a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-1.json b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-1.json
index aee8b9190e0fc915731d78142ecd3f54050e61f0..fba4ab8409f2de49013a2a620e08d33f9045d95e 100644
--- a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-1.json
+++ b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-1.json
@@ -271,7 +271,7 @@
"clock_speed": 3400000000,
"ht_capable": true,
"instruction_set": "x86-64",
- "microarchitecture": "Ice Lake",
+ "microarchitecture": "Ice Lake-SP",
"microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5318Y CPU @ 2.10GHz",
diff --git a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-2.json b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-2.json
index fb70ceaf1bf55478f07288511460ec67e11d3de9..9985f5d62070a7e8b484eee356ff3df41b4adb4f 100644
--- a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-2.json
+++ b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-2.json
@@ -271,7 +271,7 @@
"clock_speed": 3400000000,
"ht_capable": true,
"instruction_set": "x86-64",
- "microarchitecture": "Ice Lake",
+ "microarchitecture": "Ice Lake-SP",
"microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5318Y CPU @ 2.10GHz",
diff --git a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-3.json b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-3.json
index 72e4caa8319ab88f9ec762aad679c2d16a2244ab..f258e85be00d56f9e23fa510fe1c158ed9969d2b 100644
--- a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-3.json
+++ b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-3.json
@@ -271,7 +271,7 @@
"clock_speed": 3400000000,
"ht_capable": true,
"instruction_set": "x86-64",
- "microarchitecture": "Ice Lake",
+ "microarchitecture": "Ice Lake-SP",
"microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5318Y CPU @ 2.10GHz",
diff --git a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-4.json b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-4.json
index b9cf428c439582d1bdf7f6132929a91b6c68ef43..498a0eac68ca2ff9b2cd223e3b853136e5fc2ca9 100644
--- a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-4.json
+++ b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-4.json
@@ -271,7 +271,7 @@
"clock_speed": 3400000000,
"ht_capable": true,
"instruction_set": "x86-64",
- "microarchitecture": "Ice Lake",
+ "microarchitecture": "Ice Lake-SP",
"microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5318Y CPU @ 2.10GHz",
diff --git a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-5.json b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-5.json
index dbbb33c85c1c62d49778dd5dd797be2bd78a1352..04d74a8bb5248087dd0252696eecb00f40b2510f 100644
--- a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-5.json
+++ b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-5.json
@@ -271,7 +271,7 @@
"clock_speed": 3400000000,
"ht_capable": true,
"instruction_set": "x86-64",
- "microarchitecture": "Ice Lake",
+ "microarchitecture": "Ice Lake-SP",
"microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5318Y CPU @ 2.10GHz",
diff --git a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-6.json b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-6.json
index 11ee0ebde98c94bbf95b60ad113c2c72b329033d..8f081a5d1557b48bb5b778d3c158aa52c7d23380 100644
--- a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-6.json
+++ b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-6.json
@@ -271,7 +271,7 @@
"clock_speed": 3400000000,
"ht_capable": true,
"instruction_set": "x86-64",
- "microarchitecture": "Ice Lake",
+ "microarchitecture": "Ice Lake-SP",
"microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5318Y CPU @ 2.10GHz",
diff --git a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-7.json b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-7.json
index 82cfc1cda491f6d1b95617f5e863b27475ac76fb..3b3a39887d6d08f496cb09b465a5e6eaf162b031 100644
--- a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-7.json
+++ b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-7.json
@@ -271,7 +271,7 @@
"clock_speed": 3400000000,
"ht_capable": true,
"instruction_set": "x86-64",
- "microarchitecture": "Ice Lake",
+ "microarchitecture": "Ice Lake-SP",
"microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5318Y CPU @ 2.10GHz",
diff --git a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-8.json b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-8.json
index a55fbeba3f64929f7a5a5a36dcb2cf4eb9d04eab..231e865e55fdd13ce4cac268df08fc796a28cf3e 100644
--- a/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-8.json
+++ b/data/grid5000/sites/louvain/clusters/spirou/nodes/spirou-8.json
@@ -271,7 +271,7 @@
"clock_speed": 3400000000,
"ht_capable": true,
"instruction_set": "x86-64",
- "microarchitecture": "Ice Lake",
+ "microarchitecture": "Ice Lake-SP",
"microcode": "0xd0003e7",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5318Y CPU @ 2.10GHz",
diff --git a/data/grid5000/sites/rennes/clusters/abacus4/nodes/abacus4-1.json b/data/grid5000/sites/rennes/clusters/abacus4/nodes/abacus4-1.json
index ad034c69dd9f3db9721a1c740bdce6e985ddf22b..e4d96110abbba1eafa60544e54f06561b40c2a08 100644
--- a/data/grid5000/sites/rennes/clusters/abacus4/nodes/abacus4-1.json
+++ b/data/grid5000/sites/rennes/clusters/abacus4/nodes/abacus4-1.json
@@ -184,7 +184,7 @@
"clock_speed": 2650000000,
"ht_capable": true,
"instruction_set": "x86-64",
- "microarchitecture": "Skylake",
+ "microarchitecture": "Skylake-SP",
"microcode": "0x2007108",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4114 CPU @ 2.20GHz",
diff --git a/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-1.json b/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-1.json
index 630e69e0f370642f73fcd15dbeaa11183f09f4ad..f55fbf7d614d4ab43de8941c95de0253e6aa12d0 100644
--- a/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-1.json
+++ b/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-1.json
@@ -231,7 +231,7 @@
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
- "microarchitecture": "Skylake",
+ "microarchitecture": "Skylake-SP",
"microcode": "0x2007006",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5118 CPU @ 2.30GHz",
diff --git a/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-2.json b/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-2.json
index 8f24f7b41fb37a7ebf04e149e0563dda22d098c7..25728da3b47b8b1e59939b3eb3958f36f18bd31a 100644
--- a/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-2.json
+++ b/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-2.json
@@ -231,7 +231,7 @@
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
- "microarchitecture": "Skylake",
+ "microarchitecture": "Skylake-SP",
"microcode": "0x2007006",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5118 CPU @ 2.30GHz",
diff --git a/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-3.json b/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-3.json
index be86ae5270380a8c6641bf7d475e30163a2e428f..79f0321a9b9a22aa1c60850c19d8e1e735228cf3 100644
--- a/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-3.json
+++ b/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-3.json
@@ -231,7 +231,7 @@
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
- "microarchitecture": "Skylake",
+ "microarchitecture": "Skylake-SP",
"microcode": "0x2007006",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5118 CPU @ 2.30GHz",
diff --git a/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-4.json b/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-4.json
index 9f961b736e0ebdead885b02dcf0e3ea94248b2c9..33f67e96923ad88c61e1114caa0823e469b9f6e8 100644
--- a/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-4.json
+++ b/data/grid5000/sites/rennes/clusters/roazhon9/nodes/roazhon9-4.json
@@ -231,7 +231,7 @@
"clock_speed": 2300000000,
"ht_capable": true,
"instruction_set": "x86-64",
- "microarchitecture": "Skylake",
+ "microarchitecture": "Skylake-SP",
"microcode": "0x2007006",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Gold 5118 CPU @ 2.30GHz",
diff --git a/input/grid5000/sites/louvain/clusters/spirou/spirou.yaml b/input/grid5000/sites/louvain/clusters/spirou/spirou.yaml
index 64e6d18f9ca2c10ec831fc19427c7771d107f16a..4357d1337c11a1f951690c457511dc69fe1208d7 100644
--- a/input/grid5000/sites/louvain/clusters/spirou/spirou.yaml
+++ b/input/grid5000/sites/louvain/clusters/spirou/spirou.yaml
@@ -18,7 +18,7 @@ nodes:
besteffort: true
max_walltime: 0
processor:
- microarchitecture: Ice Lake
+ microarchitecture: Ice Lake-SP
clock_speed: 3400000000
network_adapters:
bmc:
diff --git a/input/grid5000/sites/rennes/clusters/abacus4/abacus4.yaml b/input/grid5000/sites/rennes/clusters/abacus4/abacus4.yaml
index 26c1f5bdd65b993d1bdaf9ab02a8820d3be5d442..a709005c47d8c38159533fb426953634e785d520 100644
--- a/input/grid5000/sites/rennes/clusters/abacus4/abacus4.yaml
+++ b/input/grid5000/sites/rennes/clusters/abacus4/abacus4.yaml
@@ -16,7 +16,7 @@ nodes:
besteffort: true
max_walltime: 604800
processor:
- microarchitecture: Skylake
+ microarchitecture: Skylake-SP
clock_speed: 2650000000
software:
standard-environment: debian11-x64-std
diff --git a/input/grid5000/sites/rennes/clusters/roazhon9/roazhon9.yaml b/input/grid5000/sites/rennes/clusters/roazhon9/roazhon9.yaml
index 4793c3ffa217b661191ef897fe38330f0b222656..6a44c77422008e459af0fc113a830682579e36e6 100644
--- a/input/grid5000/sites/rennes/clusters/roazhon9/roazhon9.yaml
+++ b/input/grid5000/sites/rennes/clusters/roazhon9/roazhon9.yaml
@@ -13,7 +13,7 @@ nodes:
besteffort: true
max_walltime: 604800
processor:
- microarchitecture: Skylake
+ microarchitecture: Skylake-SP
clock_speed: 2300000000
software:
standard-environment: debian11-x64-std
diff --git a/lib/refrepo/gen/wiki/generators/hardware.rb b/lib/refrepo/gen/wiki/generators/hardware.rb
index fef08119c52319e070c222f5a8ef3d62effa1937..628ebe887272c6a8d4e4120ce9b4dd8f0e170836 100644
--- a/lib/refrepo/gen/wiki/generators/hardware.rb
+++ b/lib/refrepo/gen/wiki/generators/hardware.rb
@@ -364,7 +364,6 @@ class G5KHardwareGenerator < WikiGenerator
'Haswell' => '2013',
'POWER8' => '2014',
'Broadwell' => '2015',
- 'Skylake' => '2015',
'Skylake-SP' => '2017',
'Zen' => '2017',
'Zen 2' => '2019',
@@ -373,7 +372,6 @@ class G5KHardwareGenerator < WikiGenerator
'Zen 4c' => '2022',
'Cascade Lake-SP' => '2019',
'Vulcan' => '2018',
- #'Ice Lake' => '2019', # Note there are no client Ice Lake CPU in Grid5K
'Ice Lake-SP' => '2021',
'Carmel' => '2018',
'Vega20' => '2018',
diff --git a/lib/refrepo/input_loader.rb b/lib/refrepo/input_loader.rb
index 463a11655ce1dba20eeaaca2b19fdafeaaa5f364..b93350b45e13f465b0306d816182e6ffc505b3f8 100644
--- a/lib/refrepo/input_loader.rb
+++ b/lib/refrepo/input_loader.rb
@@ -736,11 +736,11 @@ def get_flops_per_cycle(microarch, cpu_name, cluster_uid)
return 8
when "Haswell", "Broadwell", "Zen 2", "Zen 3"
return 16
- when "Ice Lake", "Ice Lake-SP"
+ when "Ice Lake-SP"
return 32
when "Zen 4", "Zen 4c"
return 48
- when "Cascade Lake-SP", "Skylake", "Skylake-SP"
+ when "Cascade Lake-SP", "Skylake-SP"
case cpu_name
when /Silver 4110/, /Silver 4114/, /Silver 4214/, /Gold 5218/, /Gold 5220/, /Gold 5115/, /Gold 5118/, /Gold 5120/, /Gold 5220R/
return 16