diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.json
index 9fd1ac19f07b6005545c12b250db42f73f70d983..35c3b5c865b9a07cfd10f73635b9941d2c9867c3 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.json
@@ -258,7 +258,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake",
- "microcode": "0xd0003a5",
+ "microcode": "0xd0003b9",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.json
index 56e66c59db43e648de9f30d43281bc9af69a4551..45a809a01629de69c78b6ae067fc00bc221a2a9d 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.json
@@ -258,7 +258,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake",
- "microcode": "0xd0003a5",
+ "microcode": "0xd0003b9",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.json
index fc2314a0e82c2a1ea75916b672fe14cb04d913d4..1663ba5e2c6c335b564bfcd4a519159572e20c6f 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.json
@@ -258,7 +258,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake",
- "microcode": "0xd0003a5",
+ "microcode": "0xd0003b9",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.json
index 3e9f92dd69bf98353f56303655f5a10a36ac3a20..d40eb4f63ac31aaf57ef0ea3358043144c00a654 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.json
@@ -258,7 +258,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake",
- "microcode": "0xd0003a5",
+ "microcode": "0xd0003b9",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-4.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-4.json
index df94c9561371ec3caef3ab8345de6fa1c0adfec1..e096a6c9d9fe3ce463519e569243754d9dc05ba1 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-4.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-4.json
@@ -258,7 +258,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake",
- "microcode": "0xd0003a5",
+ "microcode": "0xd0003b9",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.json
index 218660c8738239896c25e6491958fd0b1ae01024..b148a812bc6cc0f1c24d475207805a1157d3f063 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.json
@@ -258,7 +258,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake",
- "microcode": "0xd0003a5",
+ "microcode": "0xd0003b9",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.json
index 9530ff590aecd8455d2d494e18c8e66ba74aa8a5..792206e223fd79a484735b195fbefdfbcf519960 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.json
@@ -258,7 +258,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake",
- "microcode": "0xd0003a5",
+ "microcode": "0xd0003b9",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.json
index 65c04d40347de65c96615bd8dfbd3da80a2c08e0..db6730452ac4a19b7dfbafaf5fc562b932e42a1f 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.json
@@ -258,7 +258,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake",
- "microcode": "0xd0003a5",
+ "microcode": "0xd0003b9",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.json
index e103c356e78f42008b0c332bfdb1c12e486a39db..4cae171c70040f17b9726584330447f14fcca082 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.json
@@ -258,7 +258,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake",
- "microcode": "0xd0003a5",
+ "microcode": "0xd0003b9",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.json b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.json
index e592e9ce0b250ac20714a4f0596624c187652da0..6a6437b3c3044aaa7e07403445a26cc6ed9821cc 100644
--- a/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.json
+++ b/data/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.json
@@ -258,7 +258,7 @@
"ht_capable": true,
"instruction_set": "x86-64",
"microarchitecture": "Ice Lake",
- "microcode": "0xd0003a5",
+ "microcode": "0xd0003b9",
"model": "Intel Xeon",
"other_description": "Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz",
"vendor": "Intel",
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.yaml
index 63e8ae4a59372a93e27c269e52127e3b40112c0a..ada63f8fbd3c17deaa70a6ea777c14e9b42526dc 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-1.yaml
@@ -156,7 +156,7 @@ fleckenstein-1:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003a5'
+ microcode: '0xd0003b9'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.yaml
index 519f0171a6dac83250ec809cf172debe6f87df44..f2dada96e1c43b97d8f7aa82dd8d05c71903c4f3 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-10.yaml
@@ -156,7 +156,7 @@ fleckenstein-10:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003a5'
+ microcode: '0xd0003b9'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.yaml
index 02178c8d9d1a1ca35487eae94420c76ca7040a60..9386522a22ce966fb0361b477a1fc10922d657a4 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-2.yaml
@@ -156,7 +156,7 @@ fleckenstein-2:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003a5'
+ microcode: '0xd0003b9'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.yaml
index caf681e1454f20e0814aac95bfb6372ec98e8fc1..f1cbcfff70c6470f731b9cd785da947817c2d51a 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-3.yaml
@@ -156,7 +156,7 @@ fleckenstein-3:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003a5'
+ microcode: '0xd0003b9'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-4.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-4.yaml
index 0106c70067aa9769415ee9c4abfe8d3a2c446c9e..321e0f8feb6ee2e6e74a9f7dad9c5e832374b856 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-4.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-4.yaml
@@ -156,7 +156,7 @@ fleckenstein-4:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003a5'
+ microcode: '0xd0003b9'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.yaml
index f28a102d51cbfe58181fecf0ac564e336e6812bf..fba155fe06d1460b269a59b74d80523473b3cabb 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-5.yaml
@@ -156,7 +156,7 @@ fleckenstein-5:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003a5'
+ microcode: '0xd0003b9'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.yaml
index bf0b5b3f4f0c969e73fc91b54fc9c982d97801e6..53dc4b21b8e772af82b211e77b7913eb3f9cdba6 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-6.yaml
@@ -156,7 +156,7 @@ fleckenstein-6:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003a5'
+ microcode: '0xd0003b9'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.yaml
index 91ed94251cd55240c07363feb9aa3c443c43b3fb..601ba1f38dba688dadbbc8d8a0df8ba5353ffedc 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-7.yaml
@@ -156,7 +156,7 @@ fleckenstein-7:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003a5'
+ microcode: '0xd0003b9'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.yaml
index 6a0f4c4b23e9f4b08d1cf235b93e02cd3cb4d0e2..5f482d6063c7c1782019ee9c5c83aa842fe7584e 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-8.yaml
@@ -156,7 +156,7 @@ fleckenstein-8:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003a5'
+ microcode: '0xd0003b9'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel
diff --git a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.yaml b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.yaml
index f45948c0034257b34524ec1b74d15a900a1ab81b..c6773761b3f792704ce1bd9b0f2e555ba39a9b17 100644
--- a/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.yaml
+++ b/input/grid5000/sites/strasbourg/clusters/fleckenstein/nodes/fleckenstein-9.yaml
@@ -156,7 +156,7 @@ fleckenstein-9:
cache_l3: 25165824
ht_capable: true
instruction_set: x86-64
- microcode: '0xd0003a5'
+ microcode: '0xd0003b9'
model: Intel Xeon
other_description: Intel(R) Xeon(R) Silver 4314 CPU @ 2.40GHz
vendor: Intel