From 29197ca01b8ebfc69cbe6d3dd75d7e37156e536f Mon Sep 17 00:00:00 2001 From: Pierre Neyron <pierre.neyron@imag.fr> Date: Fri, 15 Sep 2023 23:46:56 +0200 Subject: [PATCH] [wiki:hw] Move up the accelerators tables --- lib/refrepo/gen/wiki/generators/hardware.rb | 25 ++++++++++----------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/lib/refrepo/gen/wiki/generators/hardware.rb b/lib/refrepo/gen/wiki/generators/hardware.rb index e2ae86ff79..7340e40473 100644 --- a/lib/refrepo/gen/wiki/generators/hardware.rb +++ b/lib/refrepo/gen/wiki/generators/hardware.rb @@ -298,20 +298,30 @@ class G5KHardwareGenerator < WikiGenerator table_columns = ['PMEM size'] + sites + ['Nodes total'] generated_content += MW.generate_table(table_options, table_columns, get_table_data(data, 'pmem_size')) + generated_content += "\n= Accelerators (GPU, Xeon Phi, FPGA) =" + generated_content += "\n== Accelerator families ==\n" + table_columns = ['Accelerator family'] + sites + ['Accelerators total'] + generated_content += MW.generate_table(table_options, table_columns, get_table_data(data, 'acc_families')) + table_columns = ['Accelerator model', 'Family', 'Compute capability', 'RAM size'] + sites + ['Accelerators total'] + generated_content += "\n== Accelerator models ==\n" + generated_content += MW.generate_table(table_options, table_columns, get_table_data(data, 'acc_models')) + generated_content += "\n== Accelerator cores ==\n" + table_columns = ['Accelerator model', 'Family', 'Compute capability', 'RAM size'] + sites + ['Cores total'] + generated_content += MW.generate_table(table_options, table_columns, get_table_data(data, 'acc_cores')) + generated_content += "\n= Networking =\n" generated_content += "\n== Network interconnects ==\n" table_columns = ['Interconnect'] + sites + ['Cards total'] generated_content += MW.generate_table(table_options, table_columns, get_table_data(data, 'net_interconnects')) generated_content += "\n== Nodes with several Ethernet interfaces ==\n" generated_content += generate_interfaces - generated_content += "\n== Nodes with SR-IOV support ==\n" generated_content += generate_sriov_interfaces - generated_content += "\n== Network interface models ==\n" table_columns = ['Type', 'Driver', 'Model'] + sites + ['Cards total'] generated_content += MW.generate_table(table_options, table_columns, get_table_data(data, 'net_models')) generated_content += "\n''*: Ethernet interfaces on FPGA cards are not directly usable by the operating system''" + generated_content += "\n= Storage =" generated_content += "\n== SSD models ==\n" table_columns = ['SSD interface', 'Model', 'Size'] + sites + ['SSDs total'] @@ -320,17 +330,6 @@ class G5KHardwareGenerator < WikiGenerator generated_content += generate_storage generated_content += "\n''*: disk is [[Disk_reservation|reservable]]''" - generated_content += "\n= Accelerators (GPU, Xeon Phi, FPGA) =" - generated_content += "\n== Accelerator families ==\n" - table_columns = ['Accelerator family'] + sites + ['Accelerators total'] - generated_content += MW.generate_table(table_options, table_columns, get_table_data(data, 'acc_families')) - table_columns = ['Accelerator model', 'Family', 'Compute capability', 'RAM size'] + sites + ['Accelerators total'] - generated_content += "\n== Accelerator models ==\n" - generated_content += MW.generate_table(table_options, table_columns, get_table_data(data, 'acc_models')) - generated_content += "\n== Accelerator cores ==\n" - table_columns = ['Accelerator model', 'Family', 'Compute capability', 'RAM size'] + sites + ['Cores total'] - generated_content += MW.generate_table(table_options, table_columns, get_table_data(data, 'acc_cores')) - generated_content += "\n= Nodes models =\n" table_columns = ['Nodes model'] + sites + ['Nodes total'] generated_content += MW.generate_table(table_options, table_columns, get_table_data(data, 'node_models')) -- GitLab