Commit 5ea6d732 authored by Glen Mével's avatar Glen Mével
Browse files

proofread up to \sref{sec:lang}

parent 6707a8e2
......@@ -2,10 +2,9 @@
\label{sec:intro}
Advances in multicore hardware during the last two decades have created a need for powerful tools for writing efficient and trustworthy multicore software.
These tools include well-designed programming languages and their compilers, efficient thread-safe libraries, and expressive program logics for proving programs using multicore features.
% FP suggestion: "programs using multicore features" -> "the correctness of these libraries and of the applications that exploit them"
These tools include well-designed programming languages and their compilers, efficient thread-safe libraries, and expressive program logics for proving the correctness of these and of the applications that exploit them.
While some such verification tools already exist,
researchers are only now beginning
researchers are only beginning
to explore whether and how these tools can be exploited to
modularly specify and verify realistic libraries
that support fine-grained shared-memory concurrency.
......@@ -47,22 +46,21 @@ Still, plain Iris is restricted to sequentially consistent semantics: it does no
A new generation of logics remove this restriction, for various memory models:
GPS~\cite{turon-vafeiadis-dreyer-14}, iGPS~\cite{kaiser-17} and iRC11~\cite{dang-20}
target fragments of the C11 memory model,
while \cosmo~\cite{mevel-jourdan-pottier-20} targets the \mocaml memory model.
while \cosmo~\citecosmo targets the \mocaml memory model\@.
iGPS, iRC11 and \cosmo are based on Iris.
These logics are nice pieces of work, but can become practically useful tools only
if it is demonstrated that they allow the modular verification of realistic multicore programs.
These logics settle a strong theoretical ground; their confirmation as practical tools, however,
needs a demonstration that they allow the modular verification of realistic multicore programs.
In particular, they must enable their users to precisely specify and verify concurrent data structure implementations.
A concurrent queue is an archetypal example of such a data structure:
it is widely used in practice, for example
to manage a sequence of tasks that are generated and handled by different threads. % TODO : citations
While a coarse-grained implementation (that is, a sequential queue implementation,
protected by a single lock)
While a coarse-grained implementation---that is, a sequential implementation
protected by a lock---%
would certainly be correct,
there exist more efficient implementations,
based on subtle fine-grained memory accesses,
which yield better performance, especially under heavy contention.
% FP dans la phrase précédente, on dit deux fois que c'est plus efficace
there exist implementations
which yield better performance, especially under heavy contention,
based on subtle fine-grained memory accesses.
Unfortunately, these implementations are delicate and
often rely on subtle properties of the memory model.
An informal correctness argument is difficult, and is likely
......@@ -81,59 +79,64 @@ or another concurrent data structure)
can be modularly combined.
In this paper, we present a specification of a concurrent queue,
and we formally verify that a particular concurrent queue implementation satisfies this specification.
and we formally verify that a particular implementation satisfies this specification.
While other such formalizations already exist in a sequentially-consistent
setting~\cite{vindum-birkedal-21,vindum-frumin-birkedal-21}, % TODO : more citations
we consider a weak-memory setting.
Such a formalization effort is innovative and challenging in several aspects:
Such a formalization effort is innovative and challenging in several aspects.
\begin{itemize}
\item Weak memory models are infamous for the subtlety of the reasoning that they impose.
We choose to use \cosmo~\cite{mevel-jourdan-pottier-20}, a recently-developed concurrent separation logic
that is based on Iris and that supports the weak memory model of \mocaml{}~\cite{mocaml,dolan-18}.
We choose to use \cosmo~\citecosmo, a recently-developed concurrent separation logic
based on Iris which supports the weak memory model of \mocaml{}~\cite{mocaml,dolan-18}.
We believe that this memory model and program logic strike
a good balance between the ease of reasoning offered by the logic and the flexibility and performance allowed by the memory model.
a good balance between the ease of reasoning enabled by the logic and the flexibility and performance allowed by the memory model.
\item In our quest for applicability, we wish to propose a realistic queue implementation, which could be used in real-world programs.
Since \mocaml is still at an experimental stage and does not yet offer
a wide variety of concurrent data structures,
we implement a new concurrent queue library for \mocaml.
%Since \mocaml is still at an experimental stage
%and does not offer a wide variety of concurrent data structures yet,
%we implement a new concurrent queue library for \mocaml.
% GLEN: pour éviter des répétitions, je remplace la phrase commentée par celle-ci:
Since \mocaml is still at an experimental stage
and does not offer a wide variety of concurrent data~structures yet,
its ecosystem may benefit from this new library.
We take inspiration from a well-established algorithm~\cite{rigtorp} that has been used in production in several applications.
\item The specification of our data structure should indicate that the concurrent queue behaves
as if all operations acted atomically on a common shared state,
even though in reality these operations access distinct parts of the memory and require many machine instructions.
\item The specification of the concurrent queue should indicate that it behaves
as if all of its operations acted atomically on a common shared state,
even though in reality they access distinct parts of the memory and require many machine instructions.
To address this challenge, we use the recently-developed concept of \emph{logical atomicity}~\cite{iris-15,jung-slides-2019,da2014tada},
which we transport to the setting of \cosmo.
\item To the best of our knowledge, this is the first use of logical atomicity in a weak-memory setting.
This raises new questions: for instances, even though all operations on the queue are totally ordered,
our specification and implementation offer strictly weaker guarantees than
This raises new questions: for instance, even though our implementation realizes
a total order on the operations on a queue,
it offers strictly weaker guarantees than
would be offered by
a coarse-grained implementation.
% (a sequential data structure protected with a lock). % déjà dit
Indeed, in the context of a weak memory model, the specification of a concurrent data structure
must describe not only the result of every operation,
but also the manner in which these operations are synchronized,
that is, the \emph{happens-before} relationships that exist between these operations.
This additional information allows reasoning about accesses to areas of memory \emph{outside} of the queue data structure.
It is crucial, for example,
if the queue is used to transfer the ownership of a piece of memory
from an enqueuer to a dequeuer:
must describe not only the result of its operations,
but also the manner in which these are synchronized,
that is, the \emph{happens-before} relationships that exist between these.
This additional information allows reasoning about accesses to areas of memory \emph{outside} of the data structure itself.
This is crucial, for example,
if a queue is used to transfer the ownership of a piece of memory
from a producer to a consumer:
there must exist a happens-before relationship between the \enqueue
operation and the corresponding \dequeue operation,
so as to ensure that the dequeuer acquires the enqueuer's view of this piece of memory.
Our specification is able to describe the subtle behavior of our queue implementation with respect to happens-before relationships:
indeed, our implementation establishes \emph{some} happens-before relationships,
but, even though accesses are totally ordered by logical atomicity,
not all accesses are ordered by happens-before.
so as to ensure that the consumer acquires the producer's view of this piece of memory.
Our specification faithfully captures a subtle behavior of the implementation:
even though operations are totally ordered by logical atomicity,
not all operations are ordered by happens-before---but \emph{some} are.
% GLEN: la dernière phrase est déjà dite (en plus vague) au début de cet \item.
% Cet \item est peut-être trop détaillé ? On redit tout ça dans l’article.
\item We use the Coq proof assistant~\cite{coq} to formally verify our proofs.
Our development is available as an appendix of this paper. % TODO : adapter dans la version finale
\end{itemize}
% TODO : d'autres challenges/contributions à faire figurer ici ?
The paper begins with a detailed explanation of the specification
of our concurrent queue (\sref{sec:queue:spec}).
Then, we present our implementation of
the queue in \mocaml{} (\sref{sec:queue:impl}), and explain our proof of correctness (\sref{sec:queue:proof}).
Next (\sref{sec:pipeline}), we demonstrate that our specification is indeed usable,
of a concurrent queue~(\sref{sec:queue:spec}).
Then, we present an implementation of
the queue in \mocaml~(\sref{sec:queue:impl}), and explain our proof of its correctness~(\sref{sec:queue:proof}).
Next, we demonstrate that our specification is indeed usable,
by exploiting it in the context of a simple piece of client code,
where the concurrent queue is used to establish a pipeline between
a set of producers and a set of consumers.
The paper ends with a review of the related work (\sref{sec:related}).
a set of producers and a set of consumers~(\sref{sec:pipeline}).
The paper ends with a review of the related work~(\sref{sec:related}).
......@@ -7,7 +7,7 @@
\input{figure-lang-syntax}
The syntax of our idealized version \mocaml{} is presented
The syntax of our idealized version of \mocaml{} is presented
in~\fref{fig:syntax}. It is equipped with a standard call-by-value,
left-to-right evaluation. The parts of interest are the memory operations.
Their semantics have been described by~\citet{mevel-jourdan-pottier-20};
......@@ -40,3 +40,7 @@ There is syntactic sugar for single-cell locations, or ``references'':
$\AllocANY\val$ allocates a location of length~one, $\ReadANY\loc$ reads at
offset~zero, $\WriteANY\loc\val$ writes at offset~zero and
$\CAS\loc{\val_1}{\val_2}$ performs compare-and-set at offset~zero.
Lastly, $\Fork\expr$ creates a new thread which executes $\expr$.
The expression $\Fork\expr$ returns the unit value~$\Unit$
without waiting for the completion of the new thread.
......@@ -5,11 +5,13 @@
\section{Implementation of a Bounded MRMW Queue Using a Ring Buffer}
\label{sec:queue:impl}
% TODO: find where this implementation was first described
% ref: https://github.com/rigtorp/MPMCQueue
We now present an implementation of a bounded MRMW queue, that satisfies the specification devised in \sref{sec:queue:spec}.
For the purpose of the formalization, it is written in an idealized version of the \mocaml{} language with a rigorously defined formal semantics, which we present in \sref{sec:lang} before showing its actual code (\sref{sec:queue:impl:presentation}, \sref{sec:queue:impl:code}) and giving intuitions about its mode of operation (\sref{sec:queue:impl:invariants}, \sref{sec:queue:impl:interactions}).
We now present an implementation of a bounded MRMW queue, that satisfies the specification devised in~\sref{sec:queue:spec}.
For the purpose of the formalization, it is written in an idealized version of the \mocaml{} language which we introduce in~\sref{sec:lang},
% GLEN: j’enlève "with a rigorously defined formal semantics" car la phrase
% laissait penser qu’on présentait ladite sémantique dans la section liée,
% alors qu’on le ne fait pas.
before showing the code~(\sref{sec:queue:impl:presentation},~\sref{sec:queue:impl:code})
and giving intuitions about its mode of operation~(\sref{sec:queue:impl:invariants},~\sref{sec:queue:impl:interactions}).
\input{lang}
......@@ -69,7 +71,7 @@ The status encodes this information in a single integer, as follows:
Let~\head\ and~\tail\ be the value of references \refhead and \reftail,
respectively.
%
At any time, the ranks of items that are stored (or in the process of being stored)
At any time, the ranks of items that are stored---or in the process of being stored---%
in the queue range from~\tail\ included to~\head\ excluded. This, an invariant
property of the queue is:
%
......
......@@ -317,7 +317,7 @@ At which view can we own a nonatomic memory cell?
At a view which contains the latest write event to that cell; for instance,
the view of the last writer thread when that write occurred.
%
Fortunately, in our case, any thread---enqueuer or dequeuer--which writes to the
Fortunately, in our case, any thread---enqueuer or dequeuer---which writes to the
nonatomic cell $\refelements[\modcap\idx]$ then writes to the atomic cell
$\refstatuses[\modcap\idx]$. Thus it adds its current view, including its own
write to the item field, to the view~$\sview$ stored by the status field.
......
\subsection{Specification under sequential consistency}
\label{sec:queue:spec:sc}
We now consider the situation where several threads can access the queue concurrently.
We now consider a situation where several threads can access the queue concurrently.
Let us assume for now that the memory model is sequentially consistent~\cite{lamport-79}.
%
\citet{ohearn-07} devises \CSL, an extension of \SL that enables to reason
about programs where several threads can access the same piece of memory,
through the use of ``conditional critical regions''.
This logic spawned a variety of descendants; in this work, we use
Iris~\cite{iris}, a modular framework for building separation logics.
In a seminal work, \citet{brookes-04} and \citet{ohearn-07} devised \CSL, an extension of \SL which enables to reason
about programs where several threads can access a same piece of memory.
Though the original logic achieves sharing through hard-wired ``conditional critical regions'',
it has spawned a variety of descendants lifting this limitation and pushing
further the applicability of such separation logics.
% applicability / expressiveness / generality
In this work, we use Iris~\cite{iris}, a modular framework for building separation logics.
In a derivative of \CSL, we may retain the exact same specification as is presented
in~\fref{fig:queue:spec:seq}, recalling that $\isQueueSEQ\elemList$ is an
......@@ -38,6 +40,7 @@ exclusive ownership in an \emph{invariant}.
An invariant is an assertion which is agreed upon by all threads, and is owned
by anyone; it remains true forever.
%
% GLEN: digression (on introduit le vocabulaire "public state" ici):
As the public state of the queue---the list $\elemList$ of currently stored
items---would only be known from that invariant, the client would also express
in there the properties about this state that their particular application
......@@ -55,14 +58,17 @@ would be unable to open their invariant around the triples shown
in~\fref{fig:queue:spec:seq}.
Yet these operations are ``atomic'' in some empirical sense.
The idea of logical atomicity~\cite[\S7]{jung-slides-2019,iris-15} aims at addressing that difficulty.
When using this concept, instead of using ordinary Hoare triples, we use \emph{logically atomic triples}.
This kind of triples are like Hoare triples: they specify a program fragment, have a precondition and a postcondition.
The core difference is that they allow opening invariants around the triple: in a sense, when a function is specified using logically atomic triples, one states that said function behaves just like if it were atomic.
The concept of logical atomicity~\cite[\S7]{jung-slides-2019,iris-15} aims at addressing that difficulty.
To use it, we substitute ordinary Hoare triples with \emph{logically atomic triples}.
Just like ordinary triples, they specify a program fragment with a precondition and a postcondition.
The core difference is that invariants can be opened around a logically atomic triple, regardless of the number of execution steps of the program fragment: in a sense, when a function is specified using a logically atomic triple, one states that said function behaves as if it were atomic.
%
The definition of logically atomic triples is further discussed in~\sref{sec:queue:proof:la}
and given with detail in previous work~\cite[\S7]{jung-slides-2019,iris-15}.
In order to get a good intuition, let us consider an approximated definition of that concept: a logically atomic triple $\lahoare{P}{e}{Q}$ states, roughly, that the expression $e$ contains a linearization point which has $P$ as a precondition and $Q$ as a postcondition.
This linearization point being atomic, it allows the opening of invariants just like atomic instructions.
We now try to give an intuition on that concept:
a logically atomic triple $\lahoare{P}{e}{Q}$ states, roughly, that the expression $e$ contains a linearization point which has $P$ as a precondition and $Q$ as a postcondition.
The triple then allows the opening of invariants around that linearization point
because it is an atomic instruction.
%
\begin{mathpar}
%
......@@ -94,17 +100,33 @@ This linearization point being atomic, it allows the opening of invariants just
Using logically atomic triples, the specification can be written as shown
in~\fref{fig:queue:spec:sc}.
It closely resembles that of the sequential setting (\fref{fig:queue:spec:seq}).
The first difference that can be seen is the use of angle brackets $\anglebracket{\ldots}$ denoting logically atomic triples instead of curly brackets $\curlybracket{\ldots}$ for ordinary Hoare triples.
Another difference is the presence of embedded universal quantifiers ($\lahoarebinder{\nbelems, \elemList*[]}$) in the syntax of logically atomic triples.
These additional bindings address a subtlety of logical atomicity: indeed, recall that the precondition and the postcondition are to be interpreted at the linearization point.
However, the state of the shared queue is not known in advance by the client when calling the functions $\enqueue$ and $\dequeue$: instead, both the preconditions and the postconditions need to be parameterized by said shared state.
Said otherwise, since we do not know in advance when executing a program fragment the state of the shared resource at the linearization point, a logically atomic triple provides a \emph{familly} of pre/postcondition pairs covering all the possible shared states at the linearization point.
The last difference of the sequentially consistent concurrent specification is the splitting of the representation predicate into the two parts $\isQueueSC\elemList$ and $\queueInv$, linked by the ghost name~$\gqueue$.
That splitting is an artifact of our correctness proof techniques which we detail in \sref{sec:queue:proof}.
Note that this does not complicate the use of the queue by the client: both parts of the representation predicate are produced at the same time when creating the queue, and the part $\queueInv$ is persistent and therefore freely duplicated and shared among threads.
% TODO : pour après la soumission : expliquer pourquoi QueueInv n'est pas caché dans isQueeu (footnote pour les experts d'Iris : ça rendrait isQueue non timeless, et on aurait une étape "abort" au début de enqueue/dequeue => pas impossible, mais plus compliqué)
The first noticeable difference is the use of angle brackets~$\anglebracket{\ldots}$
denoting logically atomic triples instead of curly brackets~$\curlybracket{\ldots}$
for ordinary Hoare triples.
Another difference is the presence, in the syntax of logically atomic triples,
of an explicit binder for some variables ($\nbelems, \elemList*[]$).
This binder addresses a subtlety of logical atomicity:
a client calling \enqueue or \dequeue does not know in advance
the state of the queue at the linearization point,
which is when the precondition and postcondition are to be interpreted.
Hence, both formulas have to be parameterized by said shared state.
Said otherwise, a logically atomic triple provides a \emph{family} of pre/postcondition pairs
covering every possible shared state at the linearization point.
The last departure from the sequential specification
is that the representation predicate is split into two parts:
a persistent assertion~$\queueInv$ and an exclusive assertion $\isQueueSC\elemList$,
connected by a ghost name~$\gqueue$.
That splitting is an artifact of our correctness proof technique,
which we detail in~\sref{sec:queue:proof}.
% GLEN: 1re fois qu’on parle d’assertions persistantes , définir le terme ici.
%
Note that this does not complicate the use of the queue by the client:
both assertions are produced when creating the queue,
and while the exclusive component can be put in an invariant as before,
the persistent component can be directly duplicated and distributed to all threads.
% TODO : pour après la soumission : expliquer pourquoi QueueInv n'est pas caché dans IsQueue (footnote pour les experts d'Iris : ça rendrait IsQueue non timeless, et on aurait une étape "abort" au début de enqueue/dequeue => pas impossible, mais plus compliqué)
The use of such a specification in a concrete example will be detailed in~\sref{sec:pipeline:proof}.
For now, we illustrate how a weaker specification can be easily deduced from this one.
......@@ -166,4 +188,4 @@ where the boxed assertion is an Iris invariant:
This assertion is trivial to produce at the creation of the queue,
when \make hands us the assertions $\queueInv$ and $\isQueueSC{[]}$.
Then, for proving the weaker specification of $\enqueue$ and $\dequeue$,
one would open the invariant around the associated logically atomic triples.
one opens the invariant around the associated logically atomic triples.
......@@ -12,12 +12,15 @@ which provides a proof framework for the weak memory model of \mocaml{}.
Because \hlog{} is based on Iris, logically atomic triples can also be defined in this logic.
In fact, the specification shown in~\fref{fig:queue:spec:sc} still applies.
Yet, as such, this specification is of little value in a weakly consistent context.
Indeed, as we explained in~\sref{sec:queue:spec:sc}, that specification is designed so that the representation predicate $\isQueueSC\elemList$ should be shared among threads by using an invariant.
But, in \hlog{}, invariants are restricted to a special class of assertions, called \emph{objective} assertions.
As a result, the specification shown in~\fref{fig:queue:spec:sc} is useful in a weakly consistent context only if the representation predicate $\isQueueSC\elemList$ is objective.
Hence, the first addition to our specification is the objectiveness of $\isQueueSC\elemList$.
Yet, as such, it is of little value in a weakly consistent context.
Indeed, as we explained in~\sref{sec:queue:spec:sc}, it is designed so that
$\isQueueSC\elemList$ can be shared among threads by means of an invariant.
But, in \hlog{}, invariants are restricted to a special class of assertions,
called \emph{objective} assertions.
%
Hence, our first addition to the specification is to stipulate that
the representation predicate is objective.
%
This reflects the fact that there exists a total order on the updates to the logical state,
on which all threads objectively agree.
......@@ -76,19 +79,19 @@ practical uses of a queue. For example, imagine that thread~$A$ enqueues
a pointer to a complex data structure (say, a hash table). Then, when thread~$B$
dequeues the corresponding item, one naturally expects that it is able to access
the data structure as its unique owner (provided, of course, that thread~$A$ did
not access the data structure once enqueued). In a weakly consistent memory
not access it once enqueued). In a weakly consistent memory
model, thread~$B$ must have seen all the changes that thread~$A$ made to the
data~structure. This is only possible if there is a happens-before relationship
from enqueuing to dequeuing.
In \hlog{}, happens-before relationships can be expressed as \emph{transfer of views}.
In this logic, views (noted in this paper using calligraphic capital letters, such as $\mathcal{T,H,V,S}$) are abstract values denoting the knowledge of a thread of the current state of the global shared memory.
In this logic, views (noted in this paper using calligraphic capital letters, such as $\mathcal{T,H,V,S}$) are abstract values denoting the knowledge a thread has about the state of the shared memory.
They are equipped with a lattice structure: larger views corresponds to more recent knowledge.
In \hlog{}, when $\view$ is a view, the persistent assertion $\seen\view$ denotes that the current thread has the knowledge contained in $\view$.
In order to specify a happens-before relationship between two program points of two threads, we simply have to give the client the ability to transfer any such assertion between the two program points: this corresponds to saying that the destination program point has all the knowledge the source program point had on the shared memory.
As is usual in \hlog{}~\cite{mevel-jourdan-pottier-20} and seen later with the example of the pipeline, % FP pointeur?
this can be used for transferring subjective resources from a sender to a receiver.
In \hlog{}, when $\view$ is a view, the persistent assertion~$\seen\view$ denotes that the current thread has the knowledge contained in~$\view$.
In order to specify a happens-before relationship between two program points of two threads, we simply have to give the client the ability to transfer any such assertion between the two program points: this corresponds to saying that the destination program point has all the knowledge the source program point had about the shared memory.
As is usual in \hlog{}~\citecosmo and seen later with the example of the pipeline~(\sref{sec:pipeline:proof}),
this can be used for transferring arbitrary resources from a sender to a receiver.
% GLEN: je remplace "subjective" par "arbitrary" (on n’a pas défini "subjectif")
To reflect this,
the representation predicate now takes more parameters:
......@@ -100,13 +103,13 @@ the representation predicate now takes more parameters:
\begin{enumerate}%
\item For each item~$\elem_\idx$ in the queue, we now have a corresponding
view~$\eview_\idx$. This view represents the flow of memory information
from the thread which enqueued this item, to the one that will dequeue it.
view~$\eview_\idx$. This view materializes the flow of memory knowledge
from the thread which enqueued the item, to the one which will dequeue it.
\item The \textit{head} view~$\hview$ represents memory information
\item The \textit{head} view~$\hview$ materializes memory knowledge
accumulated by successive enqueuers.
\item The \textit{tail} view~$\tview$ represents memory information
\item The \textit{tail} view~$\tview$ materializes memory knowledge
accumulated by successive dequeuers.
\end{enumerate}%
......@@ -125,9 +128,15 @@ Hence, we give fewer guarantees than a sequential queue guarded by a lock.
% FP ce serait bien de donner un exemple de scénario où le comportement
% de la queue est conforme à la spec et néanmoins non linéarisable;
% sinon ça reste vague, je trouve
Interestingly, \hlog{} is able to express this subtle difference between the behavior of our library and that of lock-based implementation: the full specification under weak memory is shown in~\fref{fig:queue:spec:weak}.
It extends the previous specification (\fref{fig:queue:spec:sc}) with views: to simplify notation, we left the premise $\queueInv$ implicit for all logically atomic specifications. The mentioned happens-before relationships are captured as follows.
%
% GLEN: Le paragraphe ce-dessus devrait se trouver plus haut, là où on présente
% les happens-before. Et il est redondant avec ce qui est dit là-bas.
Interestingly, \hlog{} is able to express this subtle difference between the behavior of our library and that of a lock-based implementation:
the full specification under weak memory is shown in~\fref{fig:queue:spec:weak}.
To simplify notation, we left the premise $\queueInv$ implicit for all logically atomic specifications.
This specification extends the previous one~(\fref{fig:queue:spec:sc}) with views.
The mentioned happens-before relationships are captured as follows.
\begin{enumerate}%
......
......@@ -8,7 +8,7 @@
A queue is a first-in first-out container data~structure. At any time, it holds
an ordered list of items. It supports two main operations: \enqueue inserts
an item at one extremity of the queue (the \emph{head}); \dequeue extracts
an item ---~if there is one~--- from the other extremity (the \emph{tail}).
an item---if there is one---from the other extremity (the \emph{tail}).
In a concurrent setting, a legitimate question is whether several threads can
operate the queue safely. The answer depends on the implementation.
......
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