Commit d546cd3a authored by ROKICKI Simon's avatar ROKICKI Simon
Browse files

Solved (correctly) the bug with syscall. This branch should now pss CI

parent d9037003
......@@ -34,7 +34,7 @@ public:
extoMem.isBranch = 0;
extoMem.useRd = dctoEx.useRd;
extoMem.isLongInstruction = 0;
extoMem.instruction = dctoEx.instruction;
ac_int<13, false> imm13 = 0;
......@@ -230,8 +230,8 @@ public:
class MultAlu: public ALU {
public:
ac_int<32, false> quotient, remainder;
//ac_int<33, false>
ac_int<6, false> state = 0;
//ac_int<33, false>
ac_int<6, false> state = 0;
bool resIsNeg;
int i;
ac_int<32, false> dataAUnsigned, dataBUnsigned;
......@@ -241,8 +241,8 @@ public:
bool valRet = false;
if (dctoEx.opCode == RISCV_OP && dctoEx.funct7 == RISCV_OP_M) {
if (state == 0) {
dataAUnsigned.set_slc(0, dctoEx.lhs);
dataBUnsigned.set_slc(0, dctoEx.rhs);
......@@ -304,7 +304,7 @@ public:
state = 32;
quotient = 0;
remainder = 0;
}
}
break;
}
}
......
......@@ -247,7 +247,7 @@ void BasicSimulator::printCycle(){
// Use the trace file to separate program output from simulator output
if(!core.stallSignals[0] && 0) {
if (!core.stallSignals[0] && ! core.stallIm && !core.stallDm){
printf("Debug trace : %x ",(unsigned int) core.ftoDC.pc);
std::cout << printDecodedInstrRISCV(core.ftoDC.instruction);
......@@ -372,7 +372,7 @@ ac_int<32, true> BasicSimulator::ldd(ac_int<32, false> addr)
void BasicSimulator::solveSyscall()
{
if((core.extoMem.opCode == RISCV_SYSTEM) && core.extoMem.instruction.slc<25>(7) == 0 && !core.stallSignals[2] && !core.stallIm && !core.stallDm && !core.stallAlu){
if((core.extoMem.opCode == RISCV_SYSTEM) && core.extoMem.instruction.slc<12>(20) == 0 && !core.stallSignals[2] && !core.stallIm && !core.stallDm && !core.stallAlu){
ac_int<32, true> syscallId = core.regFile[17];
ac_int<32, true> arg1 = core.regFile[10];
......
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